In a thin film capacitor, a first electrode layer 1 has one or more regions B in which a distance H.sub.b between a boundary surface I of the first electrode layer 1 and a dielectric layer 2, and a surface of the first electrode layer 1, becomes maximum, and an outer layer 12 has one or more regions T in which a distance H.sub.t between the boundary surface I and a surface of the outer layer 12 becomes maximum, as well as one or more regions t in which the distance H.sub.t between the boundary surface I and the surface of the outer layer 12 does not become maximum. A projected area S.sub.Hb, a projected area S.sub.Ht, and a projected area S, satisfy equations (1) and (2):
60%(S.sub.Hb/S)(1);
60%(S.sub.Ht/S)(2).

In a thin film capacitor, a first electrode layer 1 has one or more regions B in which a distance H.sub.b between a boundary surface I of the first electrode layer 1 and a dielectric layer 2, and a surface of the first electrode layer 1, becomes maximum, and an outer layer 12 has one or more regions T in which a distance H.sub.t between the boundary surface I and a surface of the outer layer 12 becomes maximum, as well as one or more regions t in which the distance H.sub.t between the boundary surface I and the surface of the outer layer 12 does not become maximum. A projected area S.sub.Hb, a projected area S.sub.Ht, and a projected area S, satisfy equations (1) and (2):
60%(S.sub.Hb/S)(1);
60%(S.sub.Ht/S)(2).

MIM capacitors using low temperature sub-nanometer periodic stack dielectrics (SN-PSD) containing repeating units of alternating high dielectric constant materials sublayer and low leakage dielectric sublayer are provided. Every sublayer has thickness less than 1 nm (sub nanometer). The high dielectric constant materials could be one or more different materials. The low leakage dielectric materials could be one or more different materials. For the SN-PSD containing more than two different materials, those materials are deposited in sequence with the leakage current of the materials from the lowest to the highest and then back to the second-lowest, or with the energy band gap of the materials from the widest to the narrowest and then back to the second widest in each periodic cell. A layer of low leakage current dielectric materials is deposited on and/or under SN-PSD. The dielectric constant of SN-PSD is much larger than that of the component oxides and can be readily deposited at 250 C. using atomic layer deposition (ALD). The ALD deposition cycle could be 20-1000 cycles. The deposition technology is not limited to ALD, could be thermal oxidation, chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (PECVD) and other thermal source assisted deposition.

A method for manufacturing an electronic component including a step of providing an outer electrode that includes a step of providing a sintered layer containing a sintered metal, a step of providing an insulation layer containing an electric insulation material, and a step of providing a Sn-containing layer containing Sn. The sintered layer extends from each of end surfaces of an element assembly onto at least one main surface thereof. The insulation layer is directly provided on the sintered layer at each of the end surfaces so as to extend in a direction perpendicular or substantially perpendicular to a side surface of the element assembly, and defines a portion of a surface of the outer electrode. The Sn-containing layer covers the sintered layer except for a portion of the sintered layer that is covered by the insulation layer, and constitutes another portion of the surface of the outer electrode.

A method for manufacturing an electronic component including a step of providing an outer electrode that includes a step of providing a sintered layer containing a sintered metal, a step of providing an insulation layer containing an electric insulation material, and a step of providing a Sn-containing layer containing Sn. The sintered layer extends from each of end surfaces of an element assembly onto at least one main surface thereof. The insulation layer is directly provided on the sintered layer at each of the end surfaces so as to extend in a direction perpendicular or substantially perpendicular to a side surface of the element assembly, and defines a portion of a surface of the outer electrode. The Sn-containing layer covers the sintered layer except for a portion of the sintered layer that is covered by the insulation layer, and constitutes another portion of the surface of the outer electrode.

An element body of a rectangular parallelepiped shape includes a first principal surface arranged to constitute a mounting surface, a second principal surface opposing the first principal surface in a first direction, a pair of side surfaces opposing each other in a second direction, and a pair of end surfaces opposing each other in a third direction. An external electrode is disposed at an end portion of the element body in the third direction. A first length of the element body in the first direction is different from a second length of the element body in the second direction. The external electrode includes a conductive resin layer. The conductive resin layer continuously covers one part of the first principal surface, one part of the end surface, and one part of each of the pair of side surfaces.

An element body of a rectangular parallelepiped shape includes a first principal surface arranged to constitute a mounting surface, a second principal surface opposing the first principal surface in a first direction, a pair of side surfaces opposing each other in a second direction, and a pair of end surfaces opposing each other in a third direction. An external electrode is disposed at an end portion of the element body in the third direction. A first length of the element body in the first direction is different from a second length of the element body in the second direction. The external electrode includes a conductive resin layer. The conductive resin layer continuously covers one part of the first principal surface, one part of the end surface, and one part of each of the pair of side surfaces.

According to one embodiment, a capacitor includes a conductive substrate, a conductive layer, a dielectric layer, and first and second external electrodes. The conductive substrate has a first main surface provided with recess(s), a second main surface, and an end face extending between edges of the first and second main surfaces. The conductive layer covers the first main surface and side walls and bottom surfaces of the recess(s). The dielectric layer is interposed between the conductive substrate and the conductive layer. The first external electrode includes a first electrode portion facing the end face and is electrically connected to the conductive layer. The second external electrode includes a second electrode portion facing the end face and is electrically connected to the conductive substrate.

A capacitor that includes a conductive metal substrate having a high porosity portion and a low porosity portion with a porosity lower than that of the high porosity portion; a dielectric layer on the conductive metal substrate; an upper electrode on the dielectric layer; an upper extended electrode on one principal face of the conductive metal substrate and electrically connected to the upper electrode; a lower extended electrode on the other principal face of the conductive metal substrate and electrically connected to the conductive metal substrate; and insulating layer on the upper electrode at a position overlapping with the low porosity portion through the dielectric layer and the upper electrode.

A capacitor that includes a conductive metal substrate having a high porosity portion and a low porosity portion with a porosity lower than that of the high porosity portion; a dielectric layer on the conductive metal substrate; an upper electrode on the dielectric layer; an upper extended electrode on one principal face of the conductive metal substrate and electrically connected to the upper electrode; a lower extended electrode on the other principal face of the conductive metal substrate and electrically connected to the conductive metal substrate; and insulating layer on the upper electrode at a position overlapping with the low porosity portion through the dielectric layer and the upper electrode.