Patent classifications
H01G4/252
Multilayer ceramic capacitor
In an embodiment, a multilayer ceramic capacitor 10 has a capacitor body 11 having a first face f1 and a second face f2 in a length direction, a third face f3 and a fourth face f4 in a width direction, a fifth face f5 and a sixth face f6 in a height direction, and a first tapering face f5a between face f1 and face f5 and a second tapering face f5b between face f2 and face 5f; a first external electrode 12 that has a first part 12a along face f1, a second part 12b along face f5, and continuously a third part 12c along face f5a; and a second external electrode 13 that has a first part 13a along face f2, a second part 13b along face f5, and continuously a third part 13c along face f5b.
Capacitor and board having the same
A capacitor includes a support member included in a body, a plurality of pillars disposed in an upper portion of the support member and each having a lower portion wider than an upper portion, and a capacitor layer disposed on a side surface and an upper surface of each pillar and including a dielectric layer and first and second electrodes alternately disposed with the dielectric layer interposed therebetween. Lower end portions of adjacent pillars are in contact with each other.
Capacitor and board having the same
A capacitor includes a support member included in a body, a plurality of pillars disposed in an upper portion of the support member and each having a lower portion wider than an upper portion, and a capacitor layer disposed on a side surface and an upper surface of each pillar and including a dielectric layer and first and second electrodes alternately disposed with the dielectric layer interposed therebetween. Lower end portions of adjacent pillars are in contact with each other.
PRE-DRILLED VIAS TO CAPTURE DOUBLE SIDED CAPACITANCE
A capacitor includes a conductive substrate having a front side and a back side, a pre-drilled via that runs from the front side of the conductive substrate to the back side of the conductive substrate, a dielectric layer on the conductive substrate, a conductive polymer layer on the dielectric layer, a first metal contact electrically connected to the conductive substrate, and a second metal contact electrically isolated from the first metal contact and electrically connected to the conductive polymer on both sides of the conductive substrate through the pre-drilled via, the first and second metal contacts being formed on the front side of the conductive substrate. A portion of the conductive substrate may be removed to leave the capacitor structurally connected only by the insulating material to an adjacent device formed on the same conductive substrate.
PRE-DRILLED VIAS TO CAPTURE DOUBLE SIDED CAPACITANCE
A capacitor includes a conductive substrate having a front side and a back side, a pre-drilled via that runs from the front side of the conductive substrate to the back side of the conductive substrate, a dielectric layer on the conductive substrate, a conductive polymer layer on the dielectric layer, a first metal contact electrically connected to the conductive substrate, and a second metal contact electrically isolated from the first metal contact and electrically connected to the conductive polymer on both sides of the conductive substrate through the pre-drilled via, the first and second metal contacts being formed on the front side of the conductive substrate. A portion of the conductive substrate may be removed to leave the capacitor structurally connected only by the insulating material to an adjacent device formed on the same conductive substrate.
Multilayer ceramic capacitor
A multilayer ceramic capacitor includes dielectric layers and internal electrode layers provided on the dielectric layers. The dielectric layers each include a perovskite compound that includes Ca and Zr, and optionally Sr and Ti. Mn is disposed at an interface between one of the dielectric layers and one of the internal electrode layers, and a Mn/Zr molar ratio at the interface is not less than about 0.117.
Multilayer component having internal electrodes alternatingly connected to external electrodes
A multilayer component is disclosed. In an embodiment, a multilayer component includes a fully active stack comprising a plurality of dielectric layers, internal electrodes and two external electrodes arranged on opposite sides of the stack, wherein at least one portion of the internal electrode layers are coated.
Multilayer component having internal electrodes alternatingly connected to external electrodes
A multilayer component is disclosed. In an embodiment, a multilayer component includes a fully active stack comprising a plurality of dielectric layers, internal electrodes and two external electrodes arranged on opposite sides of the stack, wherein at least one portion of the internal electrode layers are coated.
ELECTRONIC COMPONENT AND METHOD FOR MANUFACTURING ELECTRONIC COMPONENT
An electronic component includes an electronic component main body having a mounting surface with first and second baked electrodes located thereon at locations spaced apart from one another. A recess extends into the electronic component main body in the area between the first and second baked electrodes. The recess extends over at least a part of at least one of the first and second baked electrodes.
ELECTRONIC COMPONENT AND METHOD FOR MANUFACTURING ELECTRONIC COMPONENT
An electronic component includes an electronic component main body having a mounting surface with first and second baked electrodes located thereon at locations spaced apart from one another. A recess extends into the electronic component main body in the area between the first and second baked electrodes. The recess extends over at least a part of at least one of the first and second baked electrodes.