A method of forming a high-? dielectric cap layer on a semiconductor structure formed on a substrate includes depositing the high-? dielectric cap layer on the semiconductor structure, depositing a sacrificial silicon cap layer on the high-? dielectric cap layer, performing a post cap anneal process to harden and densify the as-deposited high-? dielectric cap layer, and removing the sacrificial silicon cap layer.

A method of forming a high-? dielectric cap layer on a semiconductor structure formed on a substrate includes depositing the high-? dielectric cap layer on the semiconductor structure, depositing a sacrificial silicon cap layer on the high-? dielectric cap layer, performing a post cap anneal process to harden and densify the as-deposited high-? dielectric cap layer, and removing the sacrificial silicon cap layer.

This disclosure relates to a cleaning composition that contains 1) at least one redox agent; 2) at least one alkylsulfonic acid or a salt thereof, the alkylsulfonic acid containing an alkyl group substituted by OH or NH.sub.2; 3) at least one aminoalcohol; 4) at least one corrosion inhibitor; 5) at least one water soluble organic solvent; 6) water; and 7) optionally, at least one pH adjusting agent.

A cutting apparatus includes a cutting unit that cuts a workpiece included in a frame unit, an ultraviolet ray irradiation unit that irradiates the frame unit with ultraviolet rays, and a control unit. The control unit includes a processing mode registration section in which commands to be output to components. The processing mode registration section registers therein a command in a cutting apparatus mode that causes the cutting unit to cut the workpiece and a command in an ultraviolet ray irradiation apparatus mode that causes the ultraviolet ray irradiation unit to irradiate the frame unit with ultraviolet rays.

The present disclosure provides a method for wafer bonding, including providing a wafer, forming a sacrificial layer on a top surface of the first wafer, trimming an edge of the first wafer to obtain a first wafer area, cleaning the top surface of the first wafer, removing the sacrificial layer, and bonding the top surface of the first wafer to a second wafer having a second wafer area greater than the first wafer area.

A gate-last ferroelectric field effect transistor includes a substrate, isolation regions, a gate structure, a side wall spacer, source and drain regions, a first metal silicide layer and an interlayer dielectric layer which are sequentially arranged from bottom to top; the present disclosure further provides a manufacturing method of a gate-last ferroelectric field effect transistor; according to structural characteristics of the gate-last ferroelectric field effect transistor and crystalline characteristics of a hafnium oxide-based ferroelectric film, a dummy gate is first introduced in a manufacturing process of the gate-last ferroelectric field effect transistor; afterwards, high-temperature annealing is performed to make sure that an unannealed hafnium oxide-based film is crystallized to form a ferroelectric phase; finally the dummy gate is removed and a gate electrode layer is deposited to meet performance requirements of the gate-last ferroelectric field effect transistor; and the gate-last ferroelectric field effect transistor has an excellent application prospect.

A method includes performing a first post Chemical Mechanical Polish (CMP) cleaning on a wafer using a first brush. The first brush rotates to clean the wafer. The method further includes performing a second post-CMP cleaning on the wafer using a second brush. The second brush rotates to clean the wafer. The first post-CMP cleaning and the second post-CMP cleaning are performed simultaneously.

The present invention relates to the controlling of the deposition quality of an epitaxial layer, for example of gallium nitride, on a growth plate, for example of silicon, in particular at the level of the edges of the plate. The invention aims, in particular, to reduce the complexity and the production cost of known solutions. The production method according to the invention highlights the existence of a chamfer on each growth plate and provides a self-positioned deposition of a protective film on at least one part of the chamfer using a mechanical mask, preventing the deposition of the protective film on the useful zone Zu through epitaxy.

A method for creating an enhanced multipaction resistant diamond-like coating (DLC) coating with lower Secondary Electron Emission (SEE) properties is performed on an initial surface by etching a DLC coating deposited on the surface after deposition and optionally creating interlayers to enhance adhesion mechanical properties between the DLC coating and the initial surface.

The present disclosure generally relates to methods of selectively forming titanium silicides on substrates. The methods are generally utilized in conjunction with contact structure integration schemes. In one embodiment, a titanium silicide material is selectively formed on a substrate as an interfacial layer on a source/drain region. The titanium silicide layer may be formed at a temperature within range of about 400 degrees Celsius to about 500 degrees Celsius.