Methods of forming patterned features and structures including the patterned features are disclosed. Exemplary methods include selectively forming a surface energy modified surface on a sidewall of structures and/or forming a surface-energy tunable layer on a surface of the substrate. The surface energy modified surface can be formed by depositing material and/or by treating the sidewall surface and/or by treating a surface adjacent the sidewall surface.

A semiconductor manufacturing device has an outer cup and inner cup with a wafer suction mount disposed within the outer cup. A photoresist material is applied to a first surface of a semiconductor wafer disposed on the wafer suction mount while rotating at a first speed. A gas port is disposed on the inner cup for dispensing a gas oriented toward a bottom side of the semiconductor wafer. The gas port purges a second surface of the semiconductor wafer with a gas to remove contamination. The second surface of the semiconductor wafer is rinsed while purging with the gas. The gas can be a stable or inert gas, such as nitrogen. The contamination is removed from the second surface of the semiconductor wafer through an outlet between the inner cup and outer cup. The semiconductor wafer rotates at a second greater speed after discontinuing purge with the gas.

In an embodiment, a method includes: forming a gate dielectric layer on an interface layer; forming a doping layer on the gate dielectric layer, the doping layer including a dipole-inducing element; annealing the doping layer to drive the dipole-inducing element through the gate dielectric layer to a first side of the gate dielectric layer adjacent the interface layer; removing the doping layer; forming a sacrificial layer on the gate dielectric layer, a material of the sacrificial layer reacting with residual dipole-inducing elements at a second side of the gate dielectric layer adjacent the sacrificial layer; removing the sacrificial layer; forming a capping layer on the gate dielectric layer; and forming a gate electrode layer on the capping layer.

Disclosed are mask layout correction methods and a method for fabricating semiconductor devices. The mask layout correction method comprises performing a first optical proximity correction on an initial pattern layout. The step of performing the first optical proximity correction includes providing a target pattern of the initial pattern layout with control points based on a first model, obtaining a predicted contour of the initial pattern layout by performing a simulation, and obtaining an error between the target pattern and the predicted contour from the control points. The control points include first control points on an edge of the target pattern and second control points in an inside of the target pattern. The step of obtaining the error includes acquiring first error values from the first control points, providing weights to the first error values, and acquiring second error values from the second control points.

A substrate treatment method for treating a substrate, includes: (a) applying a coating solution to a front surface of the substrate by a spin coating method to form a coating film; (b) supplying a solvent for the coating solution to a projection of the coating film formed at a front surface peripheral edge of the substrate at (a); and (c) rotating the substrate in a state where the supply of the solvent is stopped, to move a top of the projection to an outside in a radial direction of the substrate. (b) and (c) are repeatedly performed. The projection is a buildup of the coating solution protruding from the coating film.

Materials and methods for modifying semiconducting substrate surfaces in order to dramatically change surface energy are provided. Preferred materials include perfluorocarbon molecules or polymers with various functional groups. The functional groups (carboxylic acids, hydroxyls, epoxies, aldehydes, and/or thiols) attach materials to the substrate surface by physical adsorption or chemical bonding, while the perfluorocarbon components contribute to low surface energy. Utilization of the disclosed materials and methods allows rapid transformation of surface properties from hydrophilic to hydrophobic (water contact angle 120° and PGMEA contact angle) 70°. Selective liquiphobic modifications of copper over Si/SiOx, TiOx over Si/SiOx, and SiN over SiOx are also demonstrated.

Provided are a hardmask composition including a polymer including a structural unit represented by Chemical Formula 1 and a structural unit represented by Chemical Formula 2, and a solvent, a hardmask layer manufactured from the hardmask composition, and a method of forming patterns from the hardmask composition, wherein the definitions of Chemical Formula 1 and Chemical Formula 2 are as described in the specification.

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Methods of spatially directing the orientation and placement of multiple block copolymer (BCP) domains on isolated regions of a substrate are described. The methods involve epitaxially directing the assembly of BCP domains using spatial boundaries between regions with different surface composition, formed at the edges of isolated chemical regions on a background chemistry. Multiple vertical domains of BCP order on the isolated region, self-aligned in a direction parallel to edges of the isolated region. In some embodiments, vertical domains order on multiple isolated regions of a first chemistry of a chemical contrast pattern with horizontal domains on the regions of a second (background) chemistry of the chemical contrast pattern. Also provided herein are compositions resulting from the methods.

A method of producing a recurrent neural network computer includes consecutive steps of providing a substrate with a first electrode; structuring the first electrode by etching using a first mask made of block copolymers, such that said electrode has free regions which are randomly spatially distributed; forming a resistive-RAM-type memory layer on the first structured electrode; forming a second electrode on the memory layer; and structuring the second electrode by etching, using a second mask made of block copolymers such that said electrode has free regions which are randomly spatially distributed.

Provided are a semiconductor element intermediate including: a substrate and a multilayer resist layer, in which the multilayer resist layer includes a metal-containing film, and in which the metal-containing film has a content of germanium element of 20 atm % or more, or a total content of tin element, indium element, and gallium element of 1 atm % or more, as measured by X-ray photoelectric spectroscopy, and an application of the semiconductor intermediate.