H01L21/0271

METHOD AND APPARATUS OF PATTERNING A SEMICONDUCTOR DEVICE
20220365437 · 2022-11-17 ·

A method of forming a masking element is provided. The method includes forming a photoresist material having a polymer backbone over a substrate, where the polymer backbone includes a linking group that links a first polymer segment to a second polymer segment, each of the first and the second polymer segments having an ultraviolet (UV) curable group. The method includes exposing the photoresist material under a first UV radiation to break the link between the first polymer segment and the second polymer segment. The method includes exposing the photoresist material under a second UV radiation different from the first UV radiation to form a patterned resist layer. And the method includes developing the patterned resist layer to form a masking element.

VERTICALLY PHASE-SEPARATED LAYER OF A BLOCK COPOLYMER

A layer including a block copolymer in which a microphase-separated structure of the block copolymer has been induced perpendicular to a substrate, this process being difficult in heating under atmospheric pressure; a method for producing the layer; and a method for producing a semiconductor device in which is used a vertically phase-separated layer of a block copolymer. A vertically phase-separated layer of a block copolymer formed by heating at a pressure below atmospheric pressure and a temperature at which induced self-assembly can occur.

COMPOSITION FOR FORMING RESIST UNDERLYING FILM


R.sup.1.sub.aR.sup.2.sub.bSi(R.sup.3).sub.4−(a+b)   (1)

A composition for a silicon-containing resist underlying film and for forming a resist underlying film that can be removed by a conventional method employing dry etching, but also by a method employing wet etching using a chemical liquid in a step for processing a semiconductor substrate or the like; and a composition for forming a resist underlying film for lithography and for forming a resist underlying film that has excellent storage stability and produces less residue in a dry etching step. A composition for forming a resist underlying film, the composition including a hydrolysis condensate of a hydrolysable silane mixture containing an alkyltrialkoxy silane and a hydrolysable silane of formula (1), wherein the contained amount of the alkyltrialkoxy silane in the mixture is 0 mol % or more but less than 40 mol % with respect to the total amount by mole of all of the hydrolysable silane contained in the mixture.

SAM FORMULATIONS AND CLEANING TO PROMOTE QUICK DEPOSITIONS

Embodiments of the invention provide self-assembled monolayers (SAM) formulations and cleaning to promote quick depositions. A hydrogen-based plasma clean is performed on a structure, the structure including a metal layer and a dielectric layer. A self-assembled monolayers (SAM) solution is dispensed on the structure, the SAM solution including SAMs and a solvent, the SAMs being configured to assemble on the metal layer. The structure is rinsed with a rinse solution including the solvent.

SPIN ON CARBON COMPOSITION AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
20220367178 · 2022-11-17 ·

A spin on carbon composition, comprises: a carbon backbone polymer; a first crosslinker; and a second crosslinker. The first crosslinker reacts with the carbon backbone polymer to partially crosslink the carbon backbone polymer at a first temperature, and the second crosslinker reacts with the carbon backbone polymer to further crosslink the carbon backbone polymer at a second temperature higher than the first temperature. The first crosslinker is a monomer, oligomer, or polymer. The second crosslinker is a monomer, oligomer, or polymer. The first and second crosslinkers are different from each other. When either of the first crosslinker or the second crosslinker is a polymer, the polymer is a different polymer than the carbon backbone polymer.

EUV resist etch durability improvement and pattern collapse mitigation
09791779 · 2017-10-17 · ·

A method for patterning a substrate is described. The patterning method includes receiving a first patterned layer overlying a material layer to be etched on a substrate, wherein the first patterned layer is composed of a resist material having (i) material properties that provide lithographic resolution of less than about 40 nanometers when exposed to extreme ultraviolet radiation lithography, and (ii) material properties that provide a nominal etch resistance to an etch process condition. The first patterned layer is over-coated with an image reversal material such that the image reversal material fills and covers the first patterned layer. The patterning method further includes removing an upper portion of the image reversal material such that top surfaces of the first patterned layer are exposed, and removing the first patterned layer such that the image reversal material remains resulting in a second patterned layer.

METHOD FOR PRODUCING SUBSTRATE WITH FINE PROJECTION-AND-RECESS PATTERN, AND SUBSTRATE WITH FINE PROJECTION-AND-RECESS PATTERN OBTAINED THEREBY
20170293221 · 2017-10-12 ·

A method for producing a substrate with a fine projection-and-recess pattern which is excellent in productivity and achieves excellent pattern feature size and accuracy is provided. The method for producing a substrate with a fine projection-and-recess pattern 50 by photo-nanoimprint lithography includes: a first step S1 of applying a photocurable composition 2 to a substrate 1 to form a composition-applied substrate 10; a second step S2 of pressing a mold 20 provided with a fine projection-and-recess pattern into contact with the composition-applied substrate 10 to mold the photocurable composition 2 into recesses 5a and projections 5b; a third step S3 of irradiating the photocurable composition 2 with an active energy line to cure the photocurable composition 2 of the recesses 5a and the projections 5b and peeling off the mold 20; a fourth step S4 of removing the cured recesses 5a and etching the substrate 1 located on the lower surface of the recesses 5a; and a fifth step S5 of removing the cured projections 5b. At the first step S1, the photocurable composition 2 is applied to the substrate 1 by printing using a printing plate.

METHOD FOR PRODUCING A SELF-ALIGNING MASKING LAYER

In various embodiments, a method is provided. The method may include forming a buried electrically charged region at a predefined position in a first layer in such a way that the buried electrically charged region generates an electric field having a lateral inhomogeneous field distribution above the first layer, and forming a second layer above the first layer using the field distribution in such a way that a structure of the second layer correlates with the position of the buried electrically charged region.

Tin oxide thin film spacers in semiconductor device manufacturing

Thin tin oxide films are used as spacers in semiconductor device manufacturing. In one implementation, thin tin oxide film is conformally deposited onto a semiconductor substrate having an exposed layer of a first material (e.g., silicon oxide or silicon nitride) and a plurality of protruding features comprising a second material (e.g., silicon or carbon). For example, 10-100 nm thick tin oxide layer can be deposited using atomic layer deposition. Next, tin oxide film is removed from horizontal surfaces, without being completely removed from the sidewalls of the protruding features. Next, the material of protruding features is etched away, leaving tin oxide spacers on the substrate. This is followed by etching the unprotected portions of the first material, without removal of the spacers. Next, underlying layer is etched, and spacers are removed. Tin-containing particles can be removed from processing chambers by converting them to volatile tin hydride.

Method for Manufacturing Pillar or Hole Structures in a Layer of a Semiconductor Device, and Associated Semiconductor Structure

The present disclosure relates to a method for manufacturing pillar or hole structures in a layer of semiconductor device, and associated semiconductor structure. At least one embodiment relates to a method for manufacturing pillar structures in a layer of a semiconductor device. The pillar structures are arranged at positions forming a hexagonal matrix configuration. The method includes embedding alignment pillar structures in a backfill brush polymer layer. The method also includes providing a BCP layer on a substantially planar surface defined by an upper surface of the alignment pillar structures and the backfill brush polymer layer. Further, the method includes inducing polymer microphase separation of the BCP polymer layer into pillar structures of a first component of the BCP polymer layer embedded in a second component of the BCP polymer layer.