H01L21/34

COPLANAR DOUBLE GATE ELECTRODE OXIDE THIN FILM TRANSISTOR AND MANUFACTURE METHOD THEREOF

The present disclosure relates to a coplanar double gate electrode oxide thin film transistor, includes a substrate, a bottom gate electrode, a first gate electrode insulating layer, a oxide semiconductor layer, a source electrode contact area and a drain electrode contact area, a second gate electrode insulating layer and a top gate electrode, wherein, the upper surface of the substrate is recessed toward the inside of the substrate to form a groove, the bottom gate electrode is formed in the groove, so that the upper surface of the bottom gate electrode and the upper surface of the substrate are in the same horizontal plane. The thin film transistor of the present disclosure has the characteristics of the double gate electrode and the coplanar structure, and is capable of improving the stability of the thin film transistor, optimizing the response speed thereof, and lowering the driving voltage.

METHOD OF MANUFACTURING THIN FILM TRANSISTOR

The present application discloses a method of manufacturing a thin film transistor, including following steps: forming a gate electrode on the top surface of the substrate; depositing a gate insulating layer, a semiconductor material and an etching stop layer sequentially on the gate electrode; patterning the etching stop layer by a first mask to form a stopper; depositing a second metal layer; using a second mask and a photoresist to form a source electrode region, a drain electrode region and a channel region on the surface of the second metal layer; etching the periphery region of the source electrode region, the drain electrode region and the channel region to expose the gate insulating layer; removing the photoresist and etching the second metal layer within the channel, and form a source electrode and a drain electrode by the remaining second metal layer; and irradiating the bottom of the substrate.

Semiconductor devices and methods of manufacture thereof

Semiconductor devices and methods of manufacture thereof are disclosed. In some embodiments, a semiconductor device includes a substrate, and a plurality of contact pads disposed over the substrate. The contact pads may be arranged in a ball grid array (BGA), and the may include a plurality of corners. A metal dam is disposed around each of the plurality of corners, such as corners of the BGA.

Semiconductor devices and methods of manufacture thereof

Semiconductor devices and methods of manufacture thereof are disclosed. In some embodiments, a semiconductor device includes a substrate, and a plurality of contact pads disposed over the substrate. The contact pads may be arranged in a ball grid array (BGA), and the may include a plurality of corners. A metal dam is disposed around each of the plurality of corners, such as corners of the BGA.

Oxide semiconductor thin film, thin film transistor, manufacturing method and device

This disclosure discloses an oxide semiconductor thin film, a thin film transistor, a manufacturing method and a device, belonging to the field of flat panel display. The oxide semiconductor thin film is made of an oxide containing zirconium and indium. A method of manufacturing the oxide semiconductor thin film comprises preparing a target using the oxide containing zirconium and indium, and sputtering the target to obtain the oxide semiconductor thin film.

Oxide semiconductor thin film, thin film transistor, manufacturing method and device

This disclosure discloses an oxide semiconductor thin film, a thin film transistor, a manufacturing method and a device, belonging to the field of flat panel display. The oxide semiconductor thin film is made of an oxide containing zirconium and indium. A method of manufacturing the oxide semiconductor thin film comprises preparing a target using the oxide containing zirconium and indium, and sputtering the target to obtain the oxide semiconductor thin film.

OXIDE TFT AND METHOD OF FORMING THE SAME

The present disclosure proposes an oxide TFT and its forming method. The method includes providing a substrate, forming an active layer on top of the substrate, and performing plasma surface treatment on the active layer so to get an active layer with roughness smaller than 10 nm. The deposited active layer has high roughness and defects. However, plasma surface treatment is performed on the active layer so to reasonably control types of gas ions selected, and technical parameters such as the energy and angle of ion bombardment, so to effectively press the actively layer. The pressing force can be broken down as a vertical force and a horizontal force, and it can polish the roughness and defects on the surface of the oxide semi-conductor layer, while enhancing the adhesion of the oxide semi-conductor layer.

ACTIVE LAYER, THIN FILM TRANSISTOR, ARRAY SUBSTRATE, AND DISPLAY APPARATUS AND FABRICATION METHODS

The present disclosure provides an active layer, a thin film transistor, an array substrate, and a display apparatus, and fabrication methods thereof. A method for fabricating an active layer in a thin film transistor is provided by forming a thin film by a direct current (DC) sputtering process; and etching the thin film to form the active layer. The thin film is made of a material selected to provide the active layer with a carrier concentration of at least approximately 110.sup.17 cm.sup.3 and a carrier mobility of at least approximately 20 cm.sup.2/Vs.

ACTIVE LAYER, THIN FILM TRANSISTOR, ARRAY SUBSTRATE, AND DISPLAY APPARATUS AND FABRICATION METHODS

The present disclosure provides an active layer, a thin film transistor, an array substrate, and a display apparatus, and fabrication methods thereof. A method for fabricating an active layer in a thin film transistor is provided by forming a thin film by a direct current (DC) sputtering process; and etching the thin film to form the active layer. The thin film is made of a material selected to provide the active layer with a carrier concentration of at least approximately 110.sup.17 cm.sup.3 and a carrier mobility of at least approximately 20 cm.sup.2/Vs.

METHOD OF FABRICATING THIN FILM TRANSISTOR STRUCTURE
20180047763 · 2018-02-15 ·

A method of fabricating a thin film transistor structure is described. The method forms a photoresist pattern layer on an active pattern layer and a part of a gate insulating layer to expose a source predetermining position and a drain predetermining position of the gate insulating layer. The photoresist pattern layer has a plurality of inverted trapezoidal blocks which can be used as a mask, thereby depositing a metal layer on the photoresist pattern layer, the source predetermining position and the drain predetermining position. After removing the photoresist pattern layer and the metal layer thereon, the remaining metal layer is patterned to form a source and a drain. In the method of fabricating a thin film transistor structure, a fabricating process can be simplified, and it is unnecessary to form an etching stop layer to protect a back channel.