Patent classifications
H01L21/67011
Manufacturing method of monocrystalline silicon and monocrystalline silicon
A manufacturing method of a monocrystalline silicon includes: a growth step in which a seed crystal having contacted a silicon melt is pulled up and a crucible is rotated and raised to form a straight body of the monocrystalline silicon; a separating step in which the monocrystalline silicon is separated from the silicon melt; a state holding step in which the crucible and the monocrystalline silicon are lowered and the monocrystalline silicon is kept at a level at which an upper end of the straight body is located at the same level as an upper end of a heat shield or is located below the upper end of the heat shield for a predetermined time; and a draw-out step in which the monocrystalline silicon is drawn out of a chamber.
METHODS AND APPARATUSES FOR ELECTROPLATING AND SEED LAYER DETECTION
Disclosed herein are methods for electroplating which employ seed layer detection. Such methods may operate by selecting a wafer, illuminating one or more points within an interior region of the wafer surface, measuring a first set of one or more in-process color signals from the one or more points within the interior region, illuminating one or more points within an edge region of the wafer surface, measuring a second set of one or more in-process color signals from the one or more points within the edge region, each color signal having one or more color components, calculating a metric indicative of a difference between the color signals in the first and second sets of in-process color signals, determining whether an acceptable seed layer is present on the wafer based on whether the metric is within a predetermined range, and repeating the foregoing for one or more additional wafers.
Masking substrates for application of protective coatings
A method for applying a protective coating to selected portions of a substrate is disclosed. The method includes applying a mask to or forming a mask on at least one portion of the substrate that is not to be covered with the protective coating. The mask may be selectively formed by applying a flowable material to the substrate. Alternatively, the mask may be formed from a preformed film. With the mask in place, the protective coating may be applied to the substrate and the mask. A portion of the protective coating that overlies the mask may be delineated from other portions of the protective coating; for example, by cutting, weakening or removing material from the protective coating at locations at or adjacent to the perimeter of the mask. The portion of the protective coating that overlies the mask, and the mask, may then be removed from the substrate.
SYSTEMS AND METHODS OF GAP CALIBRATION VIA DIRECT COMPONENT CONTACT IN ELECTRONIC DEVICE MANUFACTURING SYSTEMS
An electronic device manufacturing system includes a motion control system for calibrating a gap between surfaces of process chamber or loadlock components by moving those component surfaces into direct contact with each other. The component surfaces may include a surface of a substrate and/or a substrate support and a surface of process delivery apparatus, which may be, e.g., a pattern mask and/or a plasma or gas distribution assembly. The motion control system may include a motion controller, a software program executable by the motion controller, a network, one or more actuator drivers, a software program executable by the one or more actuator drivers, one or more actuators, and one or more feedback devices. Methods of calibrating a gap via direct contact of process chamber or loadlock component surfaces are also provided, as are other aspects.
SEMICONDUCTOR PACKAGING METHODOLOGY WITH RECONSTITUTION CONCEPT USING THERMAL AND UV RELEASABLE ADHESIVE ON A CARRIER
A method of semiconductor packaging includes providing a plurality of substrate units including at least one good known substrate unit on a first adhesive layer of a first carrier. The method includes applying a first activating source to the first adhesive layer in situ such that the first adhesive layer releases from the at least one good known substrate unit without physical contact by an outside source to the at least one good known substrate unit. The method includes transferring the at least one good known substrate unit onto a second adhesive layer of a second carrier, attaching at least one die to the at least one good known substrate unit, and applying a second activating source to the second adhesive layer such that the second adhesive layer releases from the at least one good known substrate unit.
WIRELESS POWER APPARATUS FOR SUBSTRATES TREATING APPARATUS AND MANUFACTURING METHOD OF WIRELESS POWER APPARATUS FOR SUBSTRATE TREATING APPARATUS
Embodiments of the inventive concept provide a wireless power apparatus for a substrate treating apparatus and a manufacturing method for the wireless power apparatus for the substrate treating apparatus for preventing a heat generation by preventing a generation of an eddy current in a coupling element, if the coupling element is used around an outer housing at which an induced magnetic field is formed. The inventive concept provides a wireless power apparatus for a substrate treating apparatus. The wireless power apparatus includes an outer housing having a main power line forming an induced magnetic field by receiving a power, and a coupling part coupling at least two components among components which are positioned at a periphery of the main power line for fixing the main power line; and an inner housing positioned spaced apart from the outer housing, generating an electromotive force through the induced magnetic field generated from the outer housing, and supplying the electromotive force which is generated to the substrate treating apparatus, and wherein the coupling part is formed of a material at which an eddy current is not generated by the induced magnetic field.
SUBSTRATE PROCESSING APPARATUS AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
Wafer processing with no dummies is sets forth, wherein an apparatus includes: a boat that hold a product substrates in array at all of positions where substrates may be held; a tubular reactor that houses the boat; a furnace surrounding an upper side and a lateral side of the reactor; a heater provided in the furnace and adapted to heat a side portion of the reactor; a ceiling heater provided in the furnace and adapted to heat a ceiling of the reactor; and a cap heater provided inside the reactor and below the boat; a gas supply mechanism individually supplying a gas to a top side of each of the product substrates.
Methods and apparatuses for electroplating and seed layer detection
Disclosed herein are methods for electroplating which employ seed layer detection. Such methods may operate by selecting a wafer, illuminating one or more points within an interior region of the wafer surface, measuring a first set of one or more in-process color signals from the one or more points within the interior region, illuminating one or more points within an edge region of the wafer surface, measuring a second set of one or more in-process color signals from the one or more points within the edge region, each color signal having one or more color components, calculating a metric indicative of a difference between the color signals in the first and second sets of in-process color signals, determining whether an acceptable seed layer is present on the wafer based on whether the metric is within a predetermined range, and repeating the foregoing for one or more additional wafers.
SCREEN PLATE, PACKAGING METHOD, DISPLAY PANEL AND DISPLAY DEVICE
A screen plate, a packaging method, a display panel and a display device are provided. The screen plate includes a frame, a mesh fixed onto the frame and a masking film arranged on the mesh. A printing area is formed in a portion of the mesh that is not masked by the masking film. At least one masking line is arranged in the printing area. The at least one masking line is arranged along an edge of the masking film respectively. A width of the masking line is greater than a width of each mesh line of the mesh.
PROTECTIVE YTTRIA COATING FOR SEMICONDUCTOR EQUIPMENT PARTS
Disclosed herein is a poly-crystalline protective coating on a surface of a chamber component. The poly-crystalline protective coating may be deposited by thermal spraying and may comprise cubic yttria and monoclinic yttria. At least one of: (1) the ratio of the cubic yttria to monoclinic yttria, (2) the crystallite size of at least one of the cubic yttria or the monoclinic yttria, (3) the atomic ratio of oxygen (O) to yttria (Y), and/or (4) the dielectric properties of the poly-crystalline protective coating may be controlled to obtain consistent chamber performance when switching coated chamber components within a chamber of interest.