An array substrate and a manufacturing method. The array substrate includes a substrate, multiple gate and data lines, and multiple common electrode lines parallel with the gate lines. The substrate includes a first surface. Among two adjacent gate lines and data lines, one pixel region is defined. The array substrate further includes a thin-film transistor, a common electrode, a pixel electrode and a storage capacitor disposed in the pixel region. The transistor includes a gate electrode, the first insulation layer, a channel layer, a source and drain electrode. The storage capacitor includes a first and a second conductive portion. The gate electrode, the common electrode line, the common electrode and the first conductive portion are disposed on the first surface. The channel layer, the source and drain electrode, the second conductive portion and the pixel electrode are disposed on the first insulation layer. The pixel electrode is a metal layer.

The present invention provides a manufacturing method of an electrode layer of a TFT substrate and a manufacturing method of a flexible TFT substrate. The manufacturing method of an electrode layer of a TFT substrate according to the present invention first forms a metallic nickel layer on a silicon backing, followed by applying CVD to deposit a graphene layer on the metallic nickel layer and applies plasma etching to etch the graphene layer to form a patterned graphene layer, and finally dissolves away the metallic nickel layer to separate the patterned graphene layer from the silicon backing to allow for transfer of the patterned graphene layer to obtain an electrode layer on a TFT substrate, wherein the electrode layer is formed of a graphene material that has excellent electrical conduction and mechanical properties and also has good thermal stability and chemical stability, so that the manufacturing method realizes production of an electrode layer that suits the need for bending of an electrode layer of a flexible display device.

The present disclosure provides an array substrate for a display device and a manufacturing method thereof. A transparent electrode pattern (ITO) may be formed between a source/drain metal pattern and a passivation layer located above the source/drain metal pattern, which are formed in a passivation hole area of a non-active area of the array substrate. Accordingly, it may be possible to prevent display failure caused by a delamination phenomenon or peel-off of a material of the passivation layer due to the lack of adhesion strength between a metal layer and the passivation layer in the passivation hole area.

The present disclosure provides an array substrate and a display device. The array substrate includes: first common electrode lines; gate lines; a gate insulation layer; data lines, the first common electrode lines crossing the data lines to define a plurality of pixel units, each gate line dividing a corresponding pixel unit into two sub-regions, a separate TFT being arranged at each sub-region; second common electrode lines; and a drain electrode pad arranged at each sub-region and a drain electrode connection line for connecting the drain electrode pad to a drain electrode of the TFT. The drain electrode pad, the drain electrode connection line and the drain electrode are arranged at an identical layer. An orthogonal projection of each second common electrode line onto the base substrate overlaps an orthogonal projection of the drain electrode pad onto the base substrate.

An array substrate, a display panel, and a fabrication method of the array substrate are provided. The array substrate comprises a first thin film transistor including a metal oxide thin film transistor, and a second thin film transistor including an amorphous silicon thin film transistor. The first thin film transistor and the second thin film transistor are disposed above a substrate. The first thin film transistor is located in a display region of the array substrate, and the second thin film transistor is located in a peripheral circuit region of the array substrate.

A manufacturing method of flexible substrates via a screen printing machine includes moving the back-ink blade and the scraper, the scraper is above the back-ink blade, and the back-ink blade is configured to coat the adhesive material on the opening; moving the back-ink blade and the scraper along an opposite direction, the scraper is lowered down to a position below the back-ink blade, the scraper prints the adhesive material from the opening to the substrate so as to form a flexible substrate thin-film corresponding to the opening area on the substrate; and applying a baking process on the flexible substrate thin-film to obtain a cured flexible substrate. The screen printing machine forms the flexible substrate thin-film corresponding to the opening of the screen printing machine to so as to obtain the flexible substrate having a predetermined dimension, which simplifies the manufacturing process and saves the manufacturing cost.

The present invention has an object to perform a peeling treatment in a short time. Peeling is performed while a peeling layer is exposed to an atmosphere of an etching gas. Alternatively, peeling is performed while an etching gas for a peeling layer is blown to the peeling layer in an atmosphere of an etching gas. Specifically, an etching gas is blown to a part to be peeled while a layer to be peeled is torn off from a substrate. Alternatively, peeling is performed in an etchant for a peeling layer while supplying an etchant to the peeling layer.

Disclosed is a TFT substrate manufacturing method, which first forms a pixel electrode, a data line, and source/drain terminals on a base plate and then forms a channel protection layer and an oxide semiconductor layer; or alternatively first forming a buffer layer on the base plate to prevent characteristics of a TFT from being affected by direct contact between an oxide semiconductor layer and the base plate, and then forming the oxide semiconductor layer directly after formation of source/drain terminals so as to save one etch stopper layer, thus preventing damages induced in the oxide semiconductor layer by an etching operation of the source/drain terminals; and further, through forming a protective layer that covers a surface of a gate terminal to protect the gate terminal from corrosion at the same time of forming a common electrode, formation of an insulation protective layer can be saved.

A TFT array substrate, its manufacturing method and a corresponding display device are disclosed. The TFT array substrate, includes a bearing substrate, a gate line and a data line arranged across each other on the bearing substrate, a pixel region defined by the gate line and the data line, and a thin film transistor, a pixel electrode and an active layer disposed in the pixel region. Specifically, a gate of the thin film transistor is connected to the gate line, a source thereof is connected to the data line and a drain thereof is connected to the pixel electrode. Further, an insulating layer is also formed above the source of the thin film transistor, and a drain trench is formed in the insulating layer. In addition, the drain of the thin film transistor is in the drain trench and is connected to the source through the active layer.

An organic light emitting diode display device comprises a driving thin film transistor including a first semiconductor layer, a gate insulating layer formed on the first semiconductor layer. The device further includes a storage capacitor including a first capacitor electrode electrically coupled to a drain electrode of the driving thin film transistor, a buffer layer formed on the first capacitor electrode, a second semiconductor layer formed on the buffer layer, and a second capacitor electrode formed on the second semiconductor layer and electrically coupled to a gate electrode of the driving thin film transistor. The device also includes an organic light emitting diode connected to the drain electrode of the driving transistor. The gate insulating layer has at least one hole in a region where the gate insulating layer overlaps the second semiconductor layer, thereby exposing the second semiconductor layer to the second capacitor electrode.