Patent classifications
H01L23/041
Semiconductor device and method for manufacturing semiconductor device
A semiconductor device including an insulated circuit board on which a semiconductor chip is mounted, and a housing implemented by a plurality of side-walls including at least a first pair of facing side-walls, each of the facing side-walls having joint edges configured to be jointed with the insulated circuit board, and each of the joint edges has an arc-shape such that a center in an extending direction of the joint edge protrudes toward the insulated circuit board more than both ends of the extending direction of the joint edge.
SEMICONDUCTOR DEVICE
This semiconductor device is provided with a device substrate in which a semiconductor circuit including two high frequency amplifiers; a cap substrate and a sealing frame of a conductor which forms and air-tightly seals space surrounding an area, in which the semiconductor circuit is formed, between the device substrate and the cap substrate, wherein the sealing frame is configured as a line of a 90-degree hybrid circuit or a line of a rat-race circuit.
Semiconductor module
A semiconductor module includes a semiconductor element having one and the other surface, a lead terminal connected electrically and thermally to the semiconductor element, a first solder which bonds the lead terminal and the one surface of the semiconductor element together, a circuit layer over which the semiconductor element is disposed and a second solder which bonds the other surface of the semiconductor element and the circuit layer together. The inequality
(A/B)<1 holds, where A and B are the tensile strength of the first and second solder, respectively. As a result, even if the lead terminal which thermally expands because of heat generated by the semiconductor element expands or contracts toward the semiconductor element, a stress applied by the lead terminal is absorbed and relaxed by the first solder. This prevents damage to the surface electrode of the semiconductor element by suppressing the occurrence of cracks.
Embedded chip package and manufacturing method thereof
An embedded chip package according to an embodiment of the present application may include at least one chip and a frame surrounding the at least one chip, the chip having a terminal face and a back face separated by a height of the chip, the frame having a height equal to or larger than the height of the chip, wherein the gap between the chip and the frame is fully filled with a photosensitive polymer dielectric, the terminal face of the chip being coplanar with the frame, a first wiring layer being formed on the terminal face of the chip and a second wiring layer being formed on the back face of the chip.
SEMICONDUCTOR MODULE
A semiconductor module includes: a case; a semiconductor chip provided inside the case; a seal material injected to inside of the case and sealing the semiconductor chip; and a lid provided inside the case and contacting an upper surface of the seal material, wherein a tapered portion is provided at an end portion of the lid on an upper surface side, a gap is provided between a side surface of the end portion of the lid and an inner side surface of the case, and the seal material crawls up to the tapered portion through the gap.
HERMETICALLY SEALED OPTICALLY TRANSPARENT WAFER-LEVEL PACKAGES AND METHODS FOR MAKING THE SAME
Wafer level encapsulated packages includes a wafer, a glass substrate hermetically sealed to the wafer, and an electronic component. The glass substrate includes a glass cladding layer fused to a glass core layer and a cavity formed in the glass substrate. The electronic component is encapsulated within the cavity. In various embodiments, the floor of the cavity is planar and substantially parallel to a plane defined by a top surface of the glass cladding layer. The glass cladding layer has a higher etch rate in an etchant than the glass core layer. In various embodiments, the wafer level encapsulated package is substantially optically transparent. Methods for forming the wafer level encapsulated package and electronic devices formed from the wafer level encapsulated package are also described.
ELECTRONIC APPARATUS AND METHOD OF MANUFACTURING ELECTRONIC APPARATUS
According to an embodiment, an electronic apparatus includes a substrate, a semiconductor device, a non-conductive portion, first and second metal films, and a rechargeable battery. The semiconductor device is mounted on a first surface of the substrate and includes a wireless circuit. The non-conductive portion is formed on the first surface to seal the semiconductor device. The first metal film is provided along a surface of the non-conductive portion and at least one edge surface of the substrate to contact at the edge surface with a first-wire disposed on the substrate. The second metal film is provided along the surface of the non-conductive portion and the edge surface and separately from the first metal film to contact at the edge surface with a second-wire disposed on the substrate. The rechargeable battery includes first and second electrodes electrically connected to the first-wire and to the second-wire, respectively.
Apparatus for liquid immersion cooling, system for liquid immersion cooling, and method of cooling electronic device
An apparatus for liquid immersion cooling, the apparatus includes: a casing configured to be partly filled with a first coolant and immerse, in the first coolant, a heat generating component other than a first heat generating component in a plurality of heat generating component; a liquid cooling jacket provided in contact with the first heat generating component placed in the casing, and configured to cool the first heat generating component; a first cooling device configured to dissipate heat of a second coolant sent out from the liquid cooling jacket through a first pipe, thereby cooling the second coolant; and a first pump configured to send out the second coolant cooled by the first cooling device to the liquid cooling jacket through a second pipe.
SEMICONDUCTOR POWER MODULE AND POWER CONVERSION DEVICE
A semiconductor power module includes a base plate, an insulating substrate, a power semiconductor element, an external terminal, a main terminal, a connected body, a case, a highly-insulating voltage-resisting resin material, a sealing resin, and a cover. The main terminal is connected to the connected body. The connected body is directly joined to the metal plate. The connected body is provided with a receiving section in which the main terminal is received. The receiving section is provided with a slit portion. The slit portion extends from a lower end side of the receiving section toward an upper end side thereof. The lower end side is located on a side close to the insulating substrate. The upper end side is located opposite to the side close to the insulating substrate.
THREE-DIMENSIONAL INTEGRATED PACKAGE DEVICE FOR HIGH-VOLTAGE SILICON CARBIDE POWER MODULE
The present invention relates to a three-dimensional integrated package device for a high-voltage silicon carbide power module, comprising a source substrate, first chip submodules, a first driving terminal, a first driving substrate, a ceramic housing, a metal substrate, a water inlet, a water outlet, second chip submodules, a second driving terminal, a second driving substrate and a drain substrate from top to bottom; and each first chip submodule is composed of a driving connection substrate, a power source metal block, a first driving gate metal post, second driving gate metal posts, a silicon carbide bare chip, an insulation structure and the like. A three-dimensional integrated half-bridge structure is adopted to greatly reduce corresponding parasitic parameters.