Patent classifications
H01L23/053
Semiconductor package with elastic coupler and related methods
Implementations of semiconductor packages may include: a die coupled to a substrate; a housing coupled to the substrate and at least partially enclosing the die within a cavity of the housing, and; a pin fixedly coupled to the housing and electrically coupled with the die, wherein the pin includes a reversibly elastically deformable lower portion configured to compress to prevent a lower end of the pin from lowering beyond a predetermined point relative to the substrate when the housing is lowered to be coupled to the substrate.
Semiconductor device comprising sealing frame configured as a conductor
This semiconductor device is provided with a device substrate in which a semiconductor circuit including two high frequency amplifiers; a cap substrate and a sealing frame of a conductor which forms and air-tightly seals space surrounding an area, in which the semiconductor circuit is formed, between the device substrate and the cap substrate, wherein the sealing frame is configured as a line of a 90-degree hybrid circuit or a line of a rat-race circuit.
Semiconductor device including a groove within a resin insulating part positioned between and covering parts of a first electrode and a second electrode
A semiconductor device includes a first electrode; a second electrode; a resin case surrounding the first electrode and the second electrode; and a resin insulating part made of a material the same as a material of the resin case and covering part of the first electrode and part of the second electrode inside the resin case. The resin insulating part contacts an inner wall of the resin case or is separated from the inner wall of the resin case. A move positioned between the first electrode and the second electrode is formed at the resin insulating part, and thus a space in which the resin insulating part does not exist or a material different from the resin insulating part is provided between the first electrode and the second electrode.
Semiconductor device, electronic device including the same, and manufacturing method thereof
A semiconductor device includes a circuit substrate, a semiconductor package, connective terminals and supports. The circuit substrate has a first side and a second side opposite to the first side. The semiconductor package is connected to the first side of the circuit substrate. The connective terminals are located on the second side of the circuit substrate and are electrically connected to the semiconductor package via the circuit substrate. The supports are located on the second side of the circuit substrate beside the connective terminals. A material of the supports has a melting temperature higher than a melting temperature of the connective terminals.
Semiconductor device, electronic device including the same, and manufacturing method thereof
A semiconductor device includes a circuit substrate, a semiconductor package, connective terminals and supports. The circuit substrate has a first side and a second side opposite to the first side. The semiconductor package is connected to the first side of the circuit substrate. The connective terminals are located on the second side of the circuit substrate and are electrically connected to the semiconductor package via the circuit substrate. The supports are located on the second side of the circuit substrate beside the connective terminals. A material of the supports has a melting temperature higher than a melting temperature of the connective terminals.
Light emitting device
A light emitting device includes: a base having a first stepped portion and a second stepped portion; a light emitting element; an electronic member configured to be irradiated by light emitted from the light emitting element; a first wiring region located on the first stepped portion; a second wiring region located on the second stepped portion; wires connected to the light emitting element and the electronic member. The wires includes a first and second wires. The first wire has a first end that is connected to the first wiring region, and a second end. The second wire has a first end that is connected to the second wiring region, and a second end. A position of the second end of the first wire relative to the bottom face is lower than a position of the second end of the second wire relative to the bottom face.
POWER MODULE
A method includes attaching a power electronic substrate to a bottom of a frame. The frame has a box-like rectangular shape with an open top and an open bottom. The method further includes disposing an external conductive terminal on the frame. The external conductive terminal has at least one terminal stub that extends on to the front surface of the power electronic substrate. The method further includes welding the at least one terminal stub to at least one circuit trace disposed on the front surface of the power electronic substrate.
ELECTRONIC DEVICE
Provided is an electronic device including a substrate, a first metal layer, an electronic component, a cover layer, and an adhesive layer. The first metal layer is formed on the substrate. The electronic component is disposed on the substrate and electrically connected to the first metal layer. The adhesive layer is adhered to the substrate and the cover layer.
SEMICONDUCTOR DEVICE
A semiconductor device includes an insulating layer having a first surface and a second surface opposite to the first surface. The semiconductor device includes at least one semiconductor element located on a side of the first surface. The semiconductor device includes a first metal sinter and a second metal sinter. The first metal sinter is in contact with the first surface of the insulating layer and the semiconductor element, and bonds the insulating layer and the semiconductor element. The second metal sinter is in contact with the second surface of the insulating layer.
Semiconductor Packages with Thermal Lid and Methods of Forming the Same
Semiconductor three-dimensional integrated circuit packages and methods of forming the same are disclosed herein. A method includes bonding a semiconductor chip package to a substrate and depositing a thermal interface material on the semiconductor chip package. A thermal lid may be placed over and adhered to the semiconductor chip package by the thermal interface material. The thermal lid includes a wedge feature interfacing the thermal interface material. The thermal lid may be adhered to the semiconductor chip package by curing the thermal interface material.