Patent classifications
H01L23/373
Display device
Provided is a display device capable of preventing or reducing short-circuiting in an alternating high and low temperature environment. The display device is configured to display an image in a display region and includes: an insulating substrate; conductive lines provided on the insulating substrate and extending from the display region to a frame region exterior to the display region; a driver provided in the frame region and connected to the conductive lines; an organic protective film overlapping the conductive lines and extending from the display region to a region between the display region and the driver; an anisotropic conductive film provided under the driver and covering an end of the organic protective film between the display region and the driver; and a moisture-proof resin film overlapping the anisotropic conductive film and covering the end of the organic protective film between the display region and the driver.
Method for Producing a Cooling Element, and Cooling Element Produced Using Such a Method
A method of manufacturing a cooling element, including: providing at least one first metal layer and at least one second metal layer, oxidizing the at least one first metal layer and/or the at least one second metal layer, structuring the at least one first metal layer and/or the at least one second metal layer to form at least one recess, joining the at least one first metal layer and the at least one second metal layer to form the cooling element, wherein, in the joined state, at least a partial section of a cooling channel in the cooling element is formed by the recess in the at least one first metal layer and/or the at least one second metal layer, and wherein, prior to the joining, an inner side of the recess is provided at least in sections free of an oxidized surface.
COOLING OF HIGH POWER DEVICES USING SELECTIVE PATTERNED DIAMOND SURFACE
A method for efficient heat removal from a semiconducting device made from III-V semiconductor crystals includes depositing a diamond seeding layer on a patterned substrate.
SEMICONDUCTOR MODULE WITH SHAPED EXTERNAL CONTACT FOR REDUCED CRACK FORMATION IN THE ENCAPSULATION BODY
A semiconductor module includes: a chip carrier having a first side and a second, opposite side; a semiconductor chip arranged on the first side of the chip carrier; an encapsulation body that encapsulates the semiconductor chip; and at least two external contacts made of a metal or an alloy and arranged next to each other, which are electrically and mechanically connected to the first side of the first chip carrier and protrude laterally out of the encapsulation body. At least one of the external contacts has at least one wing arranged within the encapsulation body and located opposite the other external contact. The wing includes one or more cutouts that are filled with the encapsulation material of the encapsulation body.
SEMICONDUCTOR PACKAGING
Disclosed is a semiconductor packaging. The semiconductor packing comprises a substrate on which a semiconductor device is arranged on a front surface; a channel member disposed on a rear surface of the substrate and forming a cooling flow path through which a refrigerant moves; and a porous diamond layer covering an outer surface of the channel member.
SEMICONDUCTOR PACKAGES INCLUDING RECESSES TO CONTAIN SOLDER
One example of a semiconductor package includes a first substrate, a second substrate, a semiconductor die, and a spacer. The semiconductor die is attached to the first substrate. The spacer is attached to the semiconductor die and attached to the second substrate via solder. A surface of the second substrate facing the spacer includes a plurality of recesses extending from proximate at least one edge of the spacer to contain a portion of the solder.
Power semiconductor package with highly reliable chip topside
A power semiconductor module includes a substrate with a metallization layer and a power semiconductor chip bonded to the metallization layer of the substrate. A metallic plate has a first surface bonded to a surface of the power semiconductor chip opposite to the substrate. The metallic plate has a central part and a border that are both bonded to the power semiconductor chip. The border of the metallic plate is structured in such a way that the metallic plate has less metal material per volume at the border as compared to the central part of the metallic plate. Metallic interconnection elements are bonded to a second surface of the metallic plate at the central part.
Semiconductor module arrangement
A semiconductor module arrangement includes a housing and at least one pair of semiconductor substrates arranged inside the housing. Each pair of semiconductor substrates includes first and second semiconductor substrates. The first semiconductor substrate includes a first dielectric insulation layer arranged between a first metallization layer and a third metallization layer, and a second dielectric insulation layer arranged between the third metallization layer and a second metallization layer. The second semiconductor substrate includes a first dielectric insulation layer arranged between a first metallization layer and a third metallization layer, and a second dielectric insulation layer arranged between the third metallization layer and a second metallization layer. The third metallization layer of the first semiconductor substrate is electrically coupled to a first electrical potential, and the third metallization layer of the second semiconductor substrate is electrically coupled to a second electrical potential that is opposite to the first electrical potential.
Electronic device
An electronic device includes a metal member and a connected member. A metal connecting layer is provided between a lower-side surface of the metal member and an upper-side surface of the connected member, to connect the metal member and the connected member to each other. The metal connecting layer includes at least one of metal films, each of which is made of gold or gold alloy. A thickness of the metal connecting layer in an opposing area between the metal member and the connected member is smaller than a flatness of each of the lower-side surface and the upper-side surface. A rust-preventing film is formed on a side wall of the metal member in such a way that the rust-preventing film extends from an outer periphery of the metal connecting layer to a position away from the outer periphery by a predetermined distance.
COPPER/CERAMIC JOINED BODY AND INSULATING CIRCUIT SUBSTRATE
A copper/ceramic bonded body is provided, including: a copper member made of copper or a copper alloy; and a ceramic member, the copper member and the ceramic member being bonded to each other, in which a total concentration of Al, Si, Zn, and Mn is 3 atom % or less when concentration measurement is performed by an energy dispersive X-ray analysis method at a position 1000 nm away from a bonded interface between the copper member and the ceramic member to a copper member side, assuming that a total value of Cu, Mg, Ti, Zr, Nb, Hf, Al, Si, Zn, and Mn is 100 atom %.