Patent classifications
H01L23/373
SEMICONDUCTOR PACKAGE
A semiconductor package includes an interposer, an electronic device having a first side surface and a second side surface opposite to the first side surface, and including a plurality of memory dies stacked in a vertical direction, at least one first through pipe passing through the electronic device in the vertical direction adjacent to the first side surface, and moving a cooling liquid therein, and a plurality of thermal transmission lines extending in a horizontal direction inside the memory die, and extending in parallel from the first through pipe toward the second side surface.
Thermal Transfer, Management and Integrated Control Structure
The present invention includes a method of making a thermal management and signal control structure comprising forming in a substrate heat conductive vias and control vias, power vias, and ground vias, wherein the heat conductive vias and the control vias, power vias, and vias are aligned to a first metal plate on a first side of the substrate, wherein the control vias, power vias, and ground vias are surrounded by a glass layer; forming a second metal plate on a second side of the substrate, wherein the second metal plate is connected to the heat conductive vias; and forming a pad on each of the control vias, power vias, and ground vias, wherein each pad is configured to electrically connect the thermal management and signal control structure to at least one of: a printed circuit board, an integrated circuit, or a power management unit.
Carrier substrate with a thick metal interlayer and a cooling structure
The present invention proposes a carrier substrate (1) for electrical components (13), the carrier substrate (1) having a component side (4) and a cooling side (5) which is opposite the component side (4) and has a cooling structure (30), the carrier substrate (1) comprising a primary layer (10) which faces the component side (4) and is produced from ceramic for electrical insulation, and a secondary layer (20) which faces the cooling side (5) for stiffening the carrier substrate (1), characterized in that a metallic intermediate layer (15) is arranged between the primary layer (10) and the secondary layer (20) for heat transfer from the component side (4) to the cooling side (5), the metallic intermediate layer (15) being thicker than the primary layer (10) and/or the secondary layer (20).
Multi-Layer Semiconductor Material Structure and Preparation Method Thereof
The present disclosure relates to the technical field of semiconductors. Disclosed is a multi-layer semiconductor material structure and a preparation method thereof, solving the problems of the existing semiconductor materials that have poor heat dissipation, high cost, and cannot be mass-produced. The multi-layer semiconductor material structure includes a highly thermally conductive support substrate and a crystallized device function layer, where the device function layer is provided on the highly thermally conductive support substrate, and has a single-crystal surface layer.
Multi-Layer Semiconductor Material Structure and Preparation Method Thereof
The present disclosure relates to the technical field of semiconductors. Disclosed is a multi-layer semiconductor material structure and a preparation method thereof, solving the problems of the existing semiconductor materials that have poor heat dissipation, high cost, and cannot be mass-produced. The multi-layer semiconductor material structure includes a highly thermally conductive support substrate and a crystallized device function layer, where the device function layer is provided on the highly thermally conductive support substrate, and has a single-crystal surface layer.
Sintered body, substrate, circuit board, and manufacturing method of sintered body
A sintered body includes a crystal grain containing silicon nitride, and a grain boundary phase. If dielectric losses of the sintered body are measured while applying an alternating voltage to the sintered body and continuously changing a frequency of the alternating voltage from 50 Hz to 1 MHz, an average value ε.sub.A of dielectric losses of the sintered body in a frequency band from 800 kHz to 1 MHz and an average value ε.sub.B of dielectric losses of the sintered body in a frequency band from 100 Hz to 200 Hz satisfy an expression |ε.sub.A−ε.sub.B|≤0.1.
CLAMPED PYROLYTIC GRAPHITE SHEETS FOR HEAT SPREADING
A heat spreading element is provided. The heat spreading element includes compressible pyrolytic graphite sheets and rigid pyrolytic graphite sheets interleaved with the compressible pyrolytic graphite sheets.
AUTOMOBILE HEAT DISSIPATION DEVICE HAVING MODIFIED SURFACE AND SURFACE MODIFICATION AND JOINT METHOD FOR AUTOMOBILE HEAT DISSIPATION DEVICE
A surface modification and joint method for an automobile heat dissipation device and an automobile heat dissipation device having a modified surface are provided. The surface modification and joint method includes providing a metal heat dissipation device, forming a sputtered metal layer that is patterned on a surface of the metal heat dissipation device by sputtering to form a modification area of the metal heat dissipation device so as to modify the surface of the metal heat dissipation device, and jointing a surface of the sputtered metal layer to at least one automobile electronic module by sintering, so that the metal heat dissipation device is thermally coupled to the at least one automobile electronic module.
TRANSFER OF WIDE AND ULTRAWIDE BANDGAP LAYERS TO ENGINEERED SUBSTRATE
The present disclosure relates to use of 193-nm excimer laser-based lift-off (LLO) of Al.sub.0.26Ga.sub.0.74N/GaN High-electron mobility transistors (HEMTs) with thick (t>10 μm) AlN heat spreading buffer layers grown over sapphire substrates. The use of the thick AlN heat spreading layer resulted in thermal resistance (R.sub.th) of 16 Kmm/W for as-fabricated devices on sapphire, which is lower than the value of ≈25-50 Kmm/W for standard HEMT structures on sapphire without the heat-spreaders. Soldering the LLO devices onto a copper heat sink led to a further reduction of R.sub.th to 8 Kmm/W, a value comparable to published measurements on bulk SiC substrates. The reduction in R.sub.th by LLO and bonding to copper led to significantly reduced self-heating and drain current droop. A drain current density as high as 0.9 A/mm was observed despite a marginal reduction of the carrier mobility (≈1800 to ≈1500 cm.sup.2/Vs). This is the highest drain current density and mobility reported to-date for LLO AlGaN/GaN HEMTs.
ELECTRONIC MOUNTING SUBSTRATE AND ELECTRONIC DEVICE
An electronic element mounting substrate includes a first substrate that has a first main surface, has a rectangular shape, and has a mounting portion for an electronic element on the first main surface, and a second substrate that is located on a second main surface opposite to the first main surface, is made of a carbon material, has a rectangular shape, has a third main surface facing the second main surface and a fourth main surface opposite to the third main surface, in which the third main surface or the fourth main surface has heat conduction in a longitudinal direction greater than heat conduction in a direction perpendicular to the longitudinal direction, and that has a recessed portion on the fourth main surface.