The present invention relates to a power module and a method for manufacturing same, in which an insulating spacer is disposed between two upper and lower substrates to thus efficiently dissipate the heat generated from a semiconductor chip mounted between the substrates, and prevent bending deformation due to heat. In addition, since the spacer made of an insulating material is integrated with the substrates by brazing bonding, the bonding strength is improved, thereby maintaining strong bonding even against vibration, etc.

The present invention relates to a power module and a method for manufacturing same, in which an insulating spacer is disposed between two upper and lower substrates to thus efficiently dissipate the heat generated from a semiconductor chip mounted between the substrates, and prevent bending deformation due to heat. In addition, since the spacer made of an insulating material is integrated with the substrates by brazing bonding, the bonding strength is improved, thereby maintaining strong bonding even against vibration, etc.

Embodiments of the present disclosure may generally relate to systems, apparatuses, techniques, and/or processes directed to packages that include stacked dies that use thermal conductivity features including thermally conductive through silicon vias (TSVs) filled with thermally conductive material located in passive areas of a first die to route heat from a first die away from a second die that is coupled with the first die. In embodiments, the first die may be referred to as a base die. Embodiments may include thermal blocks in the form of dummy dies that include TSVs at least partially filled with thermal energy conducting material such as copper, solder, or other alloy.

Embodiments of the present disclosure may generally relate to systems, apparatuses, techniques, and/or processes directed to packages that include stacked dies that use thermal conductivity features including thermally conductive through silicon vias (TSVs) filled with thermally conductive material located in passive areas of a first die to route heat from a first die away from a second die that is coupled with the first die. In embodiments, the first die may be referred to as a base die. Embodiments may include thermal blocks in the form of dummy dies that include TSVs at least partially filled with thermal energy conducting material such as copper, solder, or other alloy.

An electronic apparatus, a semiconductor package module and a method for manufacturing the semiconductor package module are provided. The semiconductor package module includes: an encapsulated structure, including a device die and an encapsulant laterally enclosing the device die; a package substrate, attached to a first side of the encapsulated structure; a composite thermal interfacial structure, disposed on a second side of the encapsulated structure, and including thermally conductive elements arranged side by side or stacked along a vertical direction; a ring structure, attached to the package substrate and laterally surrounding the encapsulated structure; and a heat spreader, attached to the second side of the encapsulated structure through the composite thermal interfacial structure, and supported by the ring structure.

A method of forming an polymer composites is disclosed herein that includes infiltrating CNT sponges with a polymer or metal to form a composite. The method uses a relatively easy, scalable, and low-cost synthesis process that makes the composites attractive as TIM. CNTs in the sponge structure are covalently bonded, resulting in a low Young's modulus while at the same time maintaining a good thermal conductivity. This strategy makes it possible to obtain both high deformability and high thermal conductivity, which are difficult to have simultaneously due to their adverse correlation.

A semiconductor package may include; a first substrate, a first semiconductor chip disposed on the first substrate, an interposer disposed on the first semiconductor chip, a connecter spaced apart from the first semiconductor chip in a first horizontal direction and extending between the first substrate and the interposer, wherein the connecter directly electrically connects the first substrate and the interposer, a capacitor disposed between the connecter and the first semiconductor chip, and a guide pattern including a first guide portion and an opposing second guide portion spaced apart in the first horizontal direction, wherein the first guide portion is disposed between the connecter and the capacitor, the second guide portion is disposed between the capacitor and the first semiconductor chip, and at least part of the capacitor is inserted between the first guide portion and the second guide portion.

A semiconductor chip package is provided with improved connections between different components within the package. The semiconductor chip package may comprise a semiconductor chip disposed on a substrate. The semiconductor chip may have a first surface and a second surface. The first surface of the semiconductor chip may be connected to the substrate. The semiconductor chip package may comprise a leadframe that includes a first lead and a second lead. The first lead of the leadframe may be directly attached to the second surface of the semiconductor chip. The second lead of the leadframe may be directly attached to the substrate.

Semiconductor devices including thermally conductive structures are disclosed herein. A heat transfer structure may be thermally coupled to a semiconductor device and directly attached to a signaling layer of a substrate. The heat transfer structure may be configured to remove thermal energy from the semiconductor device and transfer at least a portion of the removed thermal energy directly into the signaling layer for dissipation within the substrate, for transfer through the substrate and out of a corresponding apparatus, or a combination thereof.

A die level cavity heat sink that can be used within current and emerging packaging technologies to improve die level thermal performance within the package. Alternatively, or in addition, selective heat sink elements are provided to further manage thermal performance within a package by providing thermal pads from the interior of the package to a surface of a mold cap where additional thermal cooling mechanisms can be utilized to further remove heat from the package area.