H01L27/13

DUAL RESISTOR INTEGRATION

An electronic device includes a first thin film resistor and a second thin film resistor above a dielectric layer that extends in a first plane of orthogonal first and second directions, the first resistor has three portions with the second portion extending between the first and third portions, and a recess etched into the top side of the second portion by a controlled etch process to increase the sheet resistance of the first resistor for dual thin film resistor integration.

DUAL RESISTOR INTEGRATION

An electronic device includes a first thin film resistor and a second thin film resistor above a dielectric layer that extends in a first plane of orthogonal first and second directions, the first resistor has three portions with the second portion extending between the first and third portions, and a recess etched into the top side of the second portion by a controlled etch process to increase the sheet resistance of the first resistor for dual thin film resistor integration.

Semiconductor device, manufacturing method thereof, and power generating device

The present disclosure provides a semiconductor device, a manufacturing method thereof, and a power generating device. The semiconductor device includes a substrate and a thin film battery on the substrate. The thin film battery includes at least one anode structure and at least one cathode structure on the substrate, and a solid electrolyte layer spacing the at least one anode structure apart from the at least one cathode structure. Each anode structure includes an anode current collector on a surface of the substrate and an anode layer on the surface of the substrate and connected to a side surface of the anode current collector. Each cathode structure includes a cathode current collector on the surface of the substrate and a cathode layer on the surface of the substrate and connected to a side surface of the cathode current collector.

Semiconductor device, manufacturing method thereof, and power generating device

The present disclosure provides a semiconductor device, a manufacturing method thereof, and a power generating device. The semiconductor device includes a substrate and a thin film battery on the substrate. The thin film battery includes at least one anode structure and at least one cathode structure on the substrate, and a solid electrolyte layer spacing the at least one anode structure apart from the at least one cathode structure. Each anode structure includes an anode current collector on a surface of the substrate and an anode layer on the surface of the substrate and connected to a side surface of the anode current collector. Each cathode structure includes a cathode current collector on the surface of the substrate and a cathode layer on the surface of the substrate and connected to a side surface of the cathode current collector.

INLINE KERF PROBING OF PASSIVE DEVICES

A radio frequency (RF) integrated circuit may include a die having passive components including at least one pair of capacitors covered by a first dielectric layer supported by the die. The RF integrated circuit may also include an inline pad structure coupled to the at least one pair of capacitors proximate an edge of the die. The inline pad structure may include a first portion and a second portion extending into a dicing street toward the edge of the die and covered by at least a second dielectric layer.

Silicon nitride film, and semiconductor device

An object of the present invention is to apply an insulating film of cure and high quality that is suitably applicable as gate insulating film and protective film to a technique that the insulating film is formed on the glass substrate under a temperature of strain point or lower, and to a semiconductor device realizing high efficiency and high reliability by using it. In a semiconductor device of the present invention, a gate insulating film of a field effect type transistor with channel length of from 0.35 to 2.5 μm in which a silicon nitride film is formed over a crystalline semiconductor film through a silicon oxide film, wherein the silicon nitride film contains hydrogen with the concentration of 1×10.sup.21/cm.sup.3 or less and has characteristic of an etching rate of 10 nm/min or less with respect to mixed solution containing an ammonium hydrogen fluoride (NH.sub.4HF.sub.2) of 7.13% and an ammonium fluoride (NH.sub.4F) of 15.4%.

CAPACITOR AND INDUCTOR EMBEDDED STRUCTURE AND MANUFACTURING METHOD THEREFOR, AND SUBSTRATE
20230197739 · 2023-06-22 ·

A capacitor and inductor embedded structure and a manufacturing method therefor, and a substrate are disclosed. The method includes: providing a metal plate; sequentially depositing and etching a first protective layer, a thin film dielectric layer, a second protective layer, and an upper electrode layer on an upper surface of the metal plate to form a thin film capacitor and a capacitor upper electrode; pressing an upper dielectric layer to the upper surface of the metal plate, covering the thin film capacitor and the capacitor upper electrode, and etching the metal plate to form a capacitor lower electrode; pressing a lower dielectric layer to a lower surface of the metal plate, and performing drilling on the upper dielectric layer and the lower dielectric layer to form inductor through holes and capacitor electrode through holes; electroplating metal to form an inductor and circuit layers.

CAPACITOR AND INDUCTOR EMBEDDED STRUCTURE AND MANUFACTURING METHOD THEREFOR, AND SUBSTRATE
20230197739 · 2023-06-22 ·

A capacitor and inductor embedded structure and a manufacturing method therefor, and a substrate are disclosed. The method includes: providing a metal plate; sequentially depositing and etching a first protective layer, a thin film dielectric layer, a second protective layer, and an upper electrode layer on an upper surface of the metal plate to form a thin film capacitor and a capacitor upper electrode; pressing an upper dielectric layer to the upper surface of the metal plate, covering the thin film capacitor and the capacitor upper electrode, and etching the metal plate to form a capacitor lower electrode; pressing a lower dielectric layer to a lower surface of the metal plate, and performing drilling on the upper dielectric layer and the lower dielectric layer to form inductor through holes and capacitor electrode through holes; electroplating metal to form an inductor and circuit layers.

SEMICONDUCTOR DEVICE

A semiconductor device including a substrate; storage node contacts on the substrate; lower electrode structures on the storage node contacts; a supporter structure on an external side surface of the lower electrode structures and connecting adjacent lower electrode structures to each other; a dielectric layer on the lower electrode structures and the supporter structure; and an upper electrode structure on the dielectric layer, wherein the lower electrode structures each include a pillar portion in contact with the storage node contacts; and a cylinder portion on the pillar portion, the pillar portion includes a first lower electrode layer having a cylindrical shape and having a lower surface and a side surface; and a first portion covering at least an internal wall of the first lower electrode layer, and the cylinder portion includes a second portion extending from the first portion and covering an upper end of the first lower electrode layer.

SEMICONDUCTOR DEVICE

A semiconductor device including a substrate; storage node contacts on the substrate; lower electrode structures on the storage node contacts; a supporter structure on an external side surface of the lower electrode structures and connecting adjacent lower electrode structures to each other; a dielectric layer on the lower electrode structures and the supporter structure; and an upper electrode structure on the dielectric layer, wherein the lower electrode structures each include a pillar portion in contact with the storage node contacts; and a cylinder portion on the pillar portion, the pillar portion includes a first lower electrode layer having a cylindrical shape and having a lower surface and a side surface; and a first portion covering at least an internal wall of the first lower electrode layer, and the cylinder portion includes a second portion extending from the first portion and covering an upper end of the first lower electrode layer.