Patent classifications
H01L27/1443
PHOTODETECTORS WITH A DEEP TRENCH ISOLATION REGION THAT INCLUDES A BRAGG MIRROR
Structures for a photodetector and methods of forming a structure for a photodetector. The structure includes a semiconductor layer having a p-n junction and a deep trench isolation region extending through the semiconductor layer. The deep trench isolation region includes first layers and second layers that alternate with the first layers to define a Bragg mirror. The first layers contain a first material having a first refractive index, and the second layers contain a second material having a second refractive index that is greater than the first refractive index.
Assembly for optical to electrical power conversion transfer
An assembly for optical to electrical power conversion including a photodiode assembly having a substrate layer and an internal side, an antireflective layer, a heterojunction buffer layer adjacent the internal side; an active area positioned adjacent the heterojunction buffer layer, a plurality of n+ electrode regions and p+ electrode regions positioned adjacent the active area, and back-contacts configured to align with the n+ and p+ electrode regions. The active area converts photons from incoming light into liberated electron hole pairs. The heterojunction buffer layer prevents electrons and holes of the liberated electron hole pairs from moving toward the substrate layer. The plurality of electrode regions are configured in an alternating pattern with gaps between each n+ and p+ electrode region. The electrode regions receive and generate electrical current from migration of the electrons and the holes, provide electrical pathways for the electrical current, and provide thermal pathways to dissipate heat.
Light detection device
A light detection device includes a photo detector and a circuit board connected to the photo detector by conductive connection parts. In this light detection device, the photo detector includes a substrate, a semiconductor layer provided on one surface of the substrate, a first groove dividing the semiconductor layer into sections for respective pixels, and first electrodes provided on the semiconductor layer and serving as the pixels. Each of the conductive connection part contains indium. Each of the first electrode includes a Ti layer and a Pt layer stacked in this order on the semiconductor layer, and the conductive connection parts are provided on the Pt layers of the first electrodes.
Germanium-based sensor with junction-gate field effect transistor and method of fabricating thereof
Germanium-based sensors are disclosed herein. An exemplary germanium-based sensor includes a germanium photodiode and a junction field effect transistor (JFET) formed from a germanium layer disposed in a silicon substrate, in some embodiments, or on a silicon substrate, in some embodiments. A doped silicon layer, which can be formed by in-situ doping epitaxially grown silicon, is disposed between the germanium layer and the silicon substrate. In embodiments where the germanium layer is on the silicon substrate, the doped silicon layer is disposed between the germanium layer and an oxide layer. The JFET has a doped polysilicon gate, and in some embodiments, a gate diffusion region is disposed in the germanium layer under the doped polysilicon gate. In some embodiments, a pinned photodiode passivation layer is disposed in the germanium layer. In some embodiments, a pair of doped regions in the germanium layer is configured as an e-lens of the germanium-based sensor.
SEMICONDUCTOR APPARATUS AND SEMICONDUCTOR DEVICE, AND METHOD OF PRODUCING THE SAME
A semiconductor device comprising a wafer with a preferably single-piece semiconductor substrate, in particular silicon substrate, and at least one integrated electronic component extending in and/or on the semiconductor substrate, the wafer having a front-end-of-line and a back-end-of-line lying there above, the front-end-of-line comprising the integrated electronic component or at least one of the integrated electronic components, and a photonic platform fabricated on the side of the wafer facing away from the front-end-of-line, which photonic platform comprises at least one waveguide and at least one electro-optical device, in particular at least one photodetector and/or at least one electro-optical modulator, wherein the electro-optical device or at least one of the electro-optical devices of the photonic platform is connected to the integrated electronic component or at least one of the integrated electronic components of the wafer.
Semiconductor Device Having an Optical Device Degradation Sensor
A semiconductor device includes: a semiconductor body; an electrical device formed in an active region of the semiconductor body, the active region including an interface between the semiconductor body and an insulating material; and a sensor having a bandwidth tuned to at least part of an energy spectrum of light emitted by carrier recombination at the interface when the electrical device is driven between accumulation and inversion, wherein an intensity of the emitted light is proportional to a density of charge trapping states at the interface, wherein the sensor is configured to output a signal that is proportional to the intensity of the sensed light. Corresponding methods of monitoring and characterizing the semiconductor device and a test apparatus are also described.
SPAD STRUCTURE
Provided is a single-photon avalanche diode (SPAD) structure. More particularly, provided is a SPAD structure having an isolation structure for electrical and/or physical separation between a pixel area and a logic area.
Light receiving device and semiconductor device
According to one embodiment, a light receiving device, includes pixel regions, each comprising a photoelectric transducer. Each photoelectric transducer is connected to a quenching resistor. A deep trench isolation structure surrounds and separates each pixel region. A plurality of shallow trench isolation portions is in the light receiving device. Each shallow trench isolation portion is below a quenching resistor and on a portion the deep trench isolation structure.
Array substrate, fabrication method for array substrate, and display panel
Embodiments of the present application provide an array substrate, a fabrication method for an array substrate, and a display panel. The array substrate includes a substrate, a gate, a gate insulating layer, a seed layer, and a semiconductor layer that are sequentially stacked. A surface of the semiconductor layer away from the seed layer has a concave-convex structure formed by growth of nanocrystalline grains, which enhances light absorption of the semiconductor layer and solves the problems of poor light sensitivity and slow response speed of semiconductor devices.
Germanium-Based Sensor with Junction-Gate Field Effect Transistor and Method of Fabricating Thereof
Germanium-based sensors are disclosed herein. An exemplary germanium-based sensor includes a germanium photodiode and a junction field effect transistor (JFET) formed from a germanium layer disposed on and/or in a silicon substrate. A doped silicon layer, which can be formed by in-situ doping epitaxially grown silicon, is disposed between the germanium layer and the silicon substrate. In embodiments where the germanium layer is on the silicon substrate, the doped silicon layer is disposed between the germanium layer and an oxide layer. The JFET has a doped polysilicon gate, and in some embodiments, a gate diffusion region is disposed in the germanium layer under the doped polysilicon gate. In some embodiments, a pinned photodiode passivation layer is disposed in the germanium layer. In some embodiments, a pair of doped regions in the germanium layer is configured as an e-lens of the germanium-based sensor.