Provided is a semiconductor epitaxial wafer, including a substrate, a first epitaxial structure, a first ohmic contact layer and a second epitaxial stack structure. It is characterized in that the ohmic contact layer includes a compound with low nitrogen content, and the ohmic contact layer does not induce significant stress during the crystal growth process. Accordingly, the second epitaxial stack structure formed on the ohmic contact layer can have good epitaxial quality, thereby providing a high-quality semiconductor epitaxial wafer for fabricating a GaAs integrated circuit or a InP integrated circuit. At the same time, the ohmic contact properties of ohmic contact layers are not affected, and the reactants generated during each dry etching process are reduced.

An array substrate is provided. The array substrate includes a display area having a first array of subpixels; and a partially transparent area having a second array of subpixels. The partially transparent area includes a plurality of light emitting regions spaced apart from each other by a substantially transparent non-light emitting region. The second array of subpixels is limited in the plurality of light emitting regions. The array substrate further includes a plurality of photosensors and a plurality of first thin film transistors in the substantially transparent non-light emitting region. A respective one of the plurality of photosensors includes a first polarity semiconductor layer, a second polarity semiconductor layer, and an intrinsic semiconductor layer connecting the first polarity semiconductor layer and the second polarity semiconductor layer.

Provided are an optical sensor including graphene quantum dots and an image sensor including an optical sensing layer. The optical sensor may include a graphene quantum dot layer that includes a plurality of first graphene quantum dots bonded to a first functional group and a plurality of second graphene quantum dots bonded to a second functional group that is different from the first functional group. An absorption wavelength band of the optical sensor may be adjusted based on types of functional groups bonded to the respective graphene quantum dots and/or sizes of the graphene quantum dots.

Low-power, dual sensitivity thin oxide FG-MOSFET sensors in RF-CMOS technology for a wireless X-ray dosimeter chip, methods for radiation measurement and for charging and discharging the sensors are described. The FG-MOSFET sensor from a 0.13 μm (RF-CMOS process, includes a thin oxide layer having a device region, a source and a drain associated with the device well region, separated by a channel region, a floating gate extending over the channel region, and a floating gate extension extending over the thin oxide layer adjacent to the device well region. In a matched sensor pair for dual sensitivity radiation measurement, the floating gate and the floating gate extension of a FG-MOSFET higher sensitivity sensor are without a salicide layer or a silicide layer formed thereon and the floating gate and the floating gate extension of a FG-MOSFET lower sensitivity sensor have a salicide layer or a silicide layer formed thereon.

A light detecting device includes a light absorbing layer configured to absorb light in a wavelength range from visible light to short-wave infrared (SWIR); a first semiconductor layer provided on a first surface of the light absorbing layer; an anti-reflective layer provided on the first semiconductor layer and comprising a material having etch selectivity with respect to the first semiconductor layer; and a second semiconductor layer provided on a second surface of the light absorbing layer. The first semiconductor layer has a thickness less than 500 nm so as to be configured to allow light to transmit therethrough in the wavelength range from visible light to SWIR.

The present application provides a sensor module, a method for manufacturing the sensor module, and a display panel. The sensor module is integrated by a light-sensitive PN junction and a bottom-gate thin film transistor, a limitation of an integration of top-gate thin film transistor photosensitive sensor is prevented, and a problem of increased thickness and development cost in an integration of a photosensitive sensor on a bottom surface and the display panel is solved.

An integrated circuit is formed in a semiconductor substrate. An array of single-photon-avalanche diodes is formed at a front side of the semiconductor substrate. The array includes first and second diodes that are adjacent to each other. A Bragg mirror is positioned between the first and second diodes. The Bragg mirror is configured to prevent a propagation of light between the first and second diodes.

A detector for electromagnetic radiation includes: a first, pixelated electrode layer having a plurality of electrode pixels; a first layer including a plurality of tiles, the plurality of tiles including a material absorbing and converting the electromagnetic radiation, wherein at least edges of tiles facing another tile have been cut using pulsed laser cutting; and a second electrode layer.

The disclosure provides an electronic device. The electronic device includes a substrate, a transistor, and a first insulating layer. The transistor is disposed on the substrate and includes a source electrode, a drain electrode, and a gate electrode. The first insulating layer is disposed between the source electrode and the gate electrode and between the drain electrode and the gate electrode. The first insulating layer has a first portion and a second portion. The first portion is defined as a portion overlapped with the source electrode and the drain electrode. The second portion is defined as a portion not overlapped with the source electrode and the drain electrode. A thickness of the first portion is greater than a thickness of the second portion. The electronic device of an embodiment of the disclosure may reduce transistor characteristic shift or improve transistor performance.

Embodiments of the present disclosure provide a detection circuit for a laser fault injection attack on a chip and a security chip. The detection circuit includes a first capacitor, a second capacitor, a first switch, a second switch, a photosensitive element, a first NMOS transistor, and a second NMOS transistor. A drain of the first NMOS transistor is configured to output a first voltage signal, and a drain of the second NMOS transistor is configured to output a second voltage signal. The first voltage signal and the second voltage signal are configured to indicate that the chip is attacked by laser fault injection, thereby realizing detection of the laser fault injection attack, and ensuring the robustness and security of the chips.