The present disclosure relates to semiconductor structures and, more particularly, to optical neuro-mimetic devices and methods of manufacture. The structure includes: a plurality of photodetectors and electrical circuitry that converts photocurrent generated from the photodetectors into electrical current and then sums up the electrical current to mimic neural functionality.

The present application discloses a sensor device and a display device. The sensor device includes a substrate, a light control component, a touch control component, and a functional dielectric layer, wherein the light control component and the touch component are disposed on the substrate, the touch component is disposed on the light control component, and the functional dielectric layer is disposed on a side of the touch control component away from the substrate and at least covers the touch control component, and configured to apply an electrostatic force to an external object when the external object is in contact with the functional dielectric layer.

In a graphene photodetector, in which a graphene film is electrically connected a first electrode and to a second electrode, the first electrode and the second electrode are formed of the same conductive material, and the first electrode and the second electrode have an asymmetric structure in interface regions with the graphene film.

A sensing device is provided. The sensing device includes a driving substrate, a sensing module, and a plurality of bonding pads. The driving substrate includes a first substrate and a plurality of driving circuits disposed on the first substrate. Each of the driving circuits includes a plurality of thin-film transistors. The sensing module is bonded to the driving substrate, and the sensing module includes a second substrate and a plurality of sensing elements disposed on the second substrate. The sensing module is bonded to the driving substrate through the bonding pads. In addition, each of the driving circuits is electrically connected to at least one of the sensing elements. An electronic device including the sensing device is also provided.

A light detector includes a substrate, a membrane disposed on a surface of the substrate, a first and a second electrode post supporting the membrane. The first electrode post includes a first main body portion having a tubular shape spreading from a first electrode pad toward a side opposite to the substrate, and a first flange portion provided in an end portion at the side opposite to the substrate in the first main body portion. The first flange portion is provided with a first sloped surface inclined so as to approach the substrate as it goes away from the first main body portion. A first wiring layer reaches an inner surface of the first main body portion through the first sloped surface. The second electrode post and the second wiring layer are formed similarly to the first electrode post and the first wiring layer.

A light receiving device includes a light receiver including pixels and a light receiving area. The pixels are arranged in an array in a first direction and in a second direction intersecting with the first direction and each of the pixels has one light receiving element or more. The light receiving area has continuous pixels out of the pixels, outputs signals based on intensities of light received in the continuous pixels, and is changed in position in the light receiver according to a signal indicating a position in the first direction and a position in the second direction.

To provide a light receiving element including: a photoelectric conversion unit (PD) that is provided in a semiconductor substrate and converts light into a charge; a first charge accumulation unit (MEM) to which the charge is transferred from the photoelectric conversion unit; a second charge accumulation unit (MEM) to which the charge is transferred from the photoelectric conversion unit, in which each of the first and second charge accumulation units includes a stack of an electrode, a first insulating layer, and a semiconductor layer.

An optical sensing apparatus is provided. The optical sensing apparatus includes a substrate, one or more pixels supported by the substrate, where each of the one or more pixels includes an absorption region, a field control region, a first contact region, a second contact region and a carrier confining region. The field control region and the first contact region are doped with a dopant of a first conductivity type. The second contact region is doped with a dopant of a second conductivity type. The carrier confining region includes a first barrier region and a channel region, where the first barrier region is doped with a dopant of the second conductivity type and has a first peak doping concentration, and where the channel region is intrinsic or doped with a dopant of the second conductivity type and has a second peak doping concentration lower than the first peak doping concentration.

A device may include: a highly doped n.sup.+ Si region; an intrinsic silicon multiplication region disposed on at least a portion of the n.sup.+ Si region, the intrinsic silicon multiplication having a thickness of about 90-110 nm; a highly doped p.sup.− Si charge region disposed on at least part of the intrinsic silicon multiplication region, the p.sup.− Si charge region having a thickness of about 40-60 nm; and a p.sup.+ Ge absorption region disposed on at least a portion of the p.sup.− Si charge region; wherein the p.sup.+ Ge absorption region is doped across its entire thickness. The thickness of the n.sup.+ Si region may be about 100 nm and the thickness of the p.sup.− Si charge region may be about 50 nm. The p.sup.+ Ge absorption region may confine the electric field to the multiplication region and the charge region to achieve a temperature stability of 4.2 mV/° C.

Microstructures of micro and/or nano holes on one or more surfaces enhance photodetector optical sensitivity. Arrangements such as a CMOS Image Sensor (CIS) as an imaging LIDAR using a high speed photodetector array wafer of Si, Ge, a Ge alloy on SI and/or Si on Ge on Si, and a wafer of CMOS Logic Processor (CLP) ib Si fi signal amplification, processing and/or transmission can be stacked for electrical interaction. The wafers can be fabricated separately and then stacked or can be regions of the same monolithic chip. The image can be a time-of-flight image. Bayer arrays can be enhanced with microstructure holes. Pixels can be photodiodes, avalanche photodiodes, single photon avalanche photodiodes and phototransistors on the same array and can be Ge or Si pixels. The array can be of high speed photodetectors with data rates of 56 Gigabits per second, Gbps, or more per photodetector.