A semiconductor device includes a substrate, a semiconductor structure suspending over the substrate and comprising a source region, a drain region, and a channel region disposed between the source region and the drain region. The channel region includes a doped two-dimensional (2D) material layer comprising a first portion on an upper surface of the channel region. The semiconductor device also includes an interfacial layer surrounding the channel region including the first portion of the doped 2D material layer, and and a gate electrode surrounding the interfacial layer.

Passivated semiconductor nanoparticles and methods for the fabrication and use of passivated semiconductor nanoparticles is provided herein.

An electrode with multiple metallic-layers structure formed by a magnetron sputtering technique for a semiconductor device and method for producing same is disclosed. The ceramic device includes at least one from selected group consisting of ZnO-MOV (metal oxide varistors), BaTiO3-PTC (positive temperature coefficient) thermistors, Mn3O4-NTC (negative temperature coefficient) thermistors, and capacitors. The multiple metallic-layers include a sputtered buffer layer and a sputtered electrical contact layer. The buffer layer includes at least one alloy selected form group consisting of NiCr (Ni from 50-90 wt %), TiNi (Ti from 40-60 wt %), and AlNi (Al from 40-70 wt %) and the thickness of this layer is from greater than zero to less than 100 nm. The electrical contact layer includes at least one of Cu, Ag, Pt, Au, or combination. More specifically, the electrode includes one of NiCr/Cu system, NiCr/Ag system, NiCr/Cu/Ag system, TiNi/Cu/Ag system, or AlNi/Cu/Ag system. The thickness ratio of the electrical contact layer to the intermetallic barrier layer is from 1 to 4.

An electrode with multiple metallic-layers structure formed by a magnetron sputtering technique for a semiconductor device and method for producing same is disclosed. The ceramic device includes at least one from selected group consisting of ZnO-MOV (metal oxide varistors), BaTiO3-PTC (positive temperature coefficient) thermistors, Mn3O4-NTC (negative temperature coefficient) thermistors, and capacitors. The multiple metallic-layers include a sputtered buffer layer and a sputtered electrical contact layer. The buffer layer includes at least one alloy selected form group consisting of NiCr (Ni from 50-90 wt %), TiNi (Ti from 40-60 wt %), and AlNi (Al from 40-70 wt %) and the thickness of this layer is from greater than zero to less than 100 nm. The electrical contact layer includes at least one of Cu, Ag, Pt, Au, or combination. More specifically, the electrode includes one of NiCr/Cu system, NiCr/Ag system, NiCr/Cu/Ag system, TiNi/Cu/Ag system, or AlNi/Cu/Ag system. The thickness ratio of the electrical contact layer to the intermetallic barrier layer is from 1 to 4.

A process of making sensors and sensor arrays that provided real time notification of any centerline deviation. Such production process can be adjusted in real time. Thus, large numbers of units can be made—even in millions of per day—with few if any out of specification units being produced. Such process does not require large-scale clean rooms and is easily configurable.

A semiconductor package includes a redistribution structure, a supporting layer, a semiconductor device, and a transition waveguide structure. The redistribution structure includes a plurality of connectors. The supporting layer is formed over the redistribution structure and disposed beside and between the plurality of connectors. The semiconductor device is disposed on the supporting layer and bonded to the plurality of connectors, wherein the semiconductor device includes a device waveguide. The transition waveguide structure is disposed on the supporting layer adjacent to the semiconductor device, wherein the transition waveguide structure is optically coupled to the device waveguide.

In some embodiments, a method of processing a substrate disposed atop a substrate support in a physical vapor deposition process chamber includes: (a) forming a plasma from a process gas within a processing region of the physical vapor deposition chamber, wherein the process gas comprises an inert gas to sputter silicon from a surface of a target within the processing region of the physical vapor deposition chamber; and (b) depositing an amorphous silicon layer atop a first layer on the substrate, wherein the first layer comprises one or more metal oxides of indium (In), gallium (Ga), zinc (Zn), tin (Sn) or combinations thereof.

In some embodiments, a method of processing a substrate disposed atop a substrate support in a physical vapor deposition process chamber includes: (a) forming a plasma from a process gas within a processing region of the physical vapor deposition chamber, wherein the process gas comprises an inert gas to sputter silicon from a surface of a target within the processing region of the physical vapor deposition chamber; and (b) depositing an amorphous silicon layer atop a first layer on the substrate, wherein the first layer comprises one or more metal oxides of indium (In), gallium (Ga), zinc (Zn), tin (Sn) or combinations thereof.

A method for manufacturing a semiconductor substrate according to the present invention includes preparing a seed substrate containing a semiconductor material, forming an ion implanted layer at a certain depth from a front surface of a main surface of the seed substrate by implanting ions into the seed substrate, growing a semiconductor layer on the main surface of the seed substrate with a vapor-phase synthesis method, and separating a semiconductor substrate including the semiconductor layer and a part of the seed substrate by irradiating the front surface of the main surface of at least any of the semiconductor layer and the seed substrate with light.

A method for manufacturing a semiconductor substrate according to the present invention includes preparing a seed substrate containing a semiconductor material, forming an ion implanted layer at a certain depth from a front surface of a main surface of the seed substrate by implanting ions into the seed substrate, growing a semiconductor layer on the main surface of the seed substrate with a vapor-phase synthesis method, and separating a semiconductor substrate including the semiconductor layer and a part of the seed substrate by irradiating the front surface of the main surface of at least any of the semiconductor layer and the seed substrate with light.