Patent classifications
H01L29/22
Thin film transistor, array substrate and display device
A thin film transistor, an array substrate and a display device are disclosed, the thin film transistor comprises a gate electrode, an active layer located on the gate electrode, and a source electrode and a drain electrode respectively located at opposite sides of the active layer and both partially overlapped with the active layer; the active layer includes at least one first structure part and at least one second structure part, a material for the first structure part is semiconductor, and a material for the second structure part is predetermined conductor, and the predetermined conductor has better conductivity than the conductivity of the conducted semiconductor, and in response to that a turn-on voltage is applied to the gate electrode, a conductive passage located between the source electrode and the drain electrode includes the first structure part and the second structure part.
Semiconductor device
A semiconductor device having high on-state current and favorable reliability is provided. The semiconductor device includes a first insulator; a first oxide over the first insulator; a second oxide over the first oxide; a third oxide and a fourth oxide over the second oxide; a first conductor over the third oxide; a second conductor over the fourth oxide; a fifth oxide over the second oxide; a second insulator over the fifth oxide; and a third conductor positioned over the second insulator and overlapping with the second oxide. The fifth oxide is in contact with each of a side surface of the third oxide and a side surface of the fourth oxide. The conductivity of the third oxide is higher than the conductivity of the second oxide, and the conductivity of the fourth oxide is higher than the conductivity of the second oxide.
Semiconductor device
A semiconductor device having high on-state current and favorable reliability is provided. The semiconductor device includes a first insulator; a first oxide over the first insulator; a second oxide over the first oxide; a third oxide and a fourth oxide over the second oxide; a first conductor over the third oxide; a second conductor over the fourth oxide; a fifth oxide over the second oxide; a second insulator over the fifth oxide; and a third conductor positioned over the second insulator and overlapping with the second oxide. The fifth oxide is in contact with each of a side surface of the third oxide and a side surface of the fourth oxide. The conductivity of the third oxide is higher than the conductivity of the second oxide, and the conductivity of the fourth oxide is higher than the conductivity of the second oxide.
HIGH APERTURE RATIO DISPLAY BY INTRODUCING TRANSPARENT STORAGE CAPACITOR AND VIA HOLE
This disclosure provides apparatuses and methods of manufacturing apparatuses including thin film transistors (TFTs) and storage capacitors. An apparatus can include a substrate, a TFT, a storage capacitor adjacent to the TFT, and a common electrode. The storage capacitor can be substantially transparent to increase aperture ratio of a display device. The storage capacitor can include an insulating layer between a first transparent electrode and a second transparent electrode. The TFT can include a gate electrode, a gate insulating layer, an oxide semiconductor, source and drain electrodes, and a dielectric layer. The oxide semiconductor can be formed out of the same layer as the first transparent electrode, and the common electrode can be formed out of the same layer as the oxide semiconductor or the source and drain electrodes.
HIGH APERTURE RATIO DISPLAY BY INTRODUCING TRANSPARENT STORAGE CAPACITOR AND VIA HOLE
This disclosure provides apparatuses and methods of manufacturing apparatuses including thin film transistors (TFTs) and storage capacitors. An apparatus can include a substrate, a TFT, a storage capacitor adjacent to the TFT, and a common electrode. The storage capacitor can be substantially transparent to increase aperture ratio of a display device. The storage capacitor can include an insulating layer between a first transparent electrode and a second transparent electrode. The TFT can include a gate electrode, a gate insulating layer, an oxide semiconductor, source and drain electrodes, and a dielectric layer. The oxide semiconductor can be formed out of the same layer as the first transparent electrode, and the common electrode can be formed out of the same layer as the oxide semiconductor or the source and drain electrodes.
Method of forming strained structures of semiconductor devices
A method of fabricating a semiconductor device comprises providing a substrate with a shallow trench isolation (STI) within the substrate and a gate stack. A cavity is formed between the gate stack and the STI. The cavity comprises one sidewall formed by the STI, one sidewall formed by the substrate, and a bottom surface formed by the substrate. A film is grown in the cavity and thereafter an opening formed by removing a first portion of the strained film until exposing the bottom surface of the substrate while a second portion of the strained film adjoins the STI sidewall. Another epitaxial layer is then grown in the opening.
Method of forming strained structures of semiconductor devices
A method of fabricating a semiconductor device comprises providing a substrate with a shallow trench isolation (STI) within the substrate and a gate stack. A cavity is formed between the gate stack and the STI. The cavity comprises one sidewall formed by the STI, one sidewall formed by the substrate, and a bottom surface formed by the substrate. A film is grown in the cavity and thereafter an opening formed by removing a first portion of the strained film until exposing the bottom surface of the substrate while a second portion of the strained film adjoins the STI sidewall. Another epitaxial layer is then grown in the opening.
Controlled manufacturing method of metal oxide semiconductor and metal oxide semiconductor structure having controlled growth crystallographic plane
A method of controlling a growth crystallographic plane of a metal oxide semiconductor having a wurtzite crystal structure by using a thermal chemical vapor deposition method includes controlling a growth crystallographic plane by allowing the metal oxide semiconductor to grow in a non-polar direction by using a source material including a thermal decomposition material that reduces a surface energy of a polar plane of the metal oxide semiconductor.
Thin film transistor and method of manufacturing the same, array substrate and display device
The present invention discloses a thin film transistor, comprising a gate electrode (2), a gate insulating layer (3), and active layer (4), and etching barrier layer (7), a source electrode and a drain electrode, wherein the source electrode comprises a first source electrode (5) and a second source electrode (8) electrically connected therewith, the drain electrode comprises a first drain electrode (6) and a second drain electrode (9) electrically connected therewith, the first source electrode and first drain electrode are formed on the active layer, the etching barrier layer at least covers a portion of the active layer between the first source electrode and the first drain electrode, and respectively covers portions of the first source electrode (5) and the first drain electrode (6) adjacent to each other, and the second source electrode and the second drain electrode are formed on the etching barrier layer. The present invention further discloses a method of manufacturing a thin film transistor, an array substrate and a display device both comprising the thin film transistor. The thin film transistor formed according to the present invention has a short channel length, which increases an on-state current of the thin film transistor while improving ohmic contact between the source and drain electrodes and the active layer, thereby increasing the stability of the thin film transistor.
Thin film transistor and method of manufacturing the same, array substrate and display device
The present invention discloses a thin film transistor, comprising a gate electrode (2), a gate insulating layer (3), and active layer (4), and etching barrier layer (7), a source electrode and a drain electrode, wherein the source electrode comprises a first source electrode (5) and a second source electrode (8) electrically connected therewith, the drain electrode comprises a first drain electrode (6) and a second drain electrode (9) electrically connected therewith, the first source electrode and first drain electrode are formed on the active layer, the etching barrier layer at least covers a portion of the active layer between the first source electrode and the first drain electrode, and respectively covers portions of the first source electrode (5) and the first drain electrode (6) adjacent to each other, and the second source electrode and the second drain electrode are formed on the etching barrier layer. The present invention further discloses a method of manufacturing a thin film transistor, an array substrate and a display device both comprising the thin film transistor. The thin film transistor formed according to the present invention has a short channel length, which increases an on-state current of the thin film transistor while improving ohmic contact between the source and drain electrodes and the active layer, thereby increasing the stability of the thin film transistor.