H01L29/32

SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
20230111002 · 2023-04-13 · ·

A semiconductor device is formed using a semiconductor substrate having a first main surface and a second main surface. A first semiconductor region of a first conductivity type is formed between the first main surface and the second main surface of the semiconductor substrate. A second semiconductor region is formed between the first semiconductor region and the first main surface. The first semiconductor region includes a hydrogen-related donor, and a concentration of the hydrogen-related donor of the first semiconductor region is equal to or larger than an impurity concentration of the first semiconductor region.

SiC semiconductor device

An SiC semiconductor device includes an SiC semiconductor layer including an SiC monocrystal and having a first main surface as an element forming surface, a second main surface at a side opposite to the first main surface, and a plurality of side surfaces connecting the first main surface and the second main surface, and a plurality of modified lines formed one layer each at the respective side surfaces of the SiC semiconductor layer and each extending in a band shape along a tangential direction to the first main surface of the SiC semiconductor layer and modified to be of a property differing from the SiC monocrystal.

GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING GERMANIUM NANOWIRE CHANNEL STRUCTURES
20230071989 · 2023-03-09 ·

Gate-all-around integrated circuit structures having germanium nanowire channel structures, and methods of fabricating gate-all-around integrated circuit structures having germanium nanowire channel structures, are described. For example, an integrated circuit structure includes a vertical arrangement of horizontal nanowires above a fin, each of the nanowires including germanium, and the fin including a defect modification layer on a first semiconductor layer, a second semiconductor layer on the defect modification layer, and a third semiconductor layer on the second semiconductor layer. A gate stack is around the vertical arrangement of horizontal nanowires. A first epitaxial source or drain structure is at a first end of the vertical arrangement of horizontal nanowires, and a second epitaxial source or drain structure is at a second end of the vertical arrangement of horizontal nanowires.

Semiconductor Device, Manufacturing Method and Electronic Equipment

The present disclosure provides a semiconductor device, a manufacturing method, and electronic equipment. The semiconductor device comprising: a substrate; an interface, for generating two-dimensional charge carrier gas; a first electrode and a second electrode; and a first semiconductor layer of a first type doping formed on the substrate, wherein first regions and a second region are formed in the first semiconductor layer, wherein in the first regions, the dopant atoms of the first type do not have electrical activity, and in the second region, the dopant atoms of the first type have electrical activity; and the second region comprises a portion coplanar with the first regions. The semiconductor device can not only avoid damage to the crystal structure, but also can be easily realized in the processing, and it can maintain good transport properties of the two-dimensional charge carrier gas, which is beneficial to the improvement of device performance.

WAFER AND SEMICONDUCTOR DEVICE

According to one embodiment, a wafer includes a base body including a first surface, and a crystal layer provided on the first surface. The crystal layer includes first stacking faults and one or second stacking faults. One of the first stacking faults includes a first long side, a first short side, and a first hypotenuse. A position of the first long side in a first direction from the base body to the crystal layer is between the base body in the first direction and a first corner portion in the first direction. One of the one or the plurality of second stacking faults includes a second long side, a second short side, and a second hypotenuse. A position of a second corner portion in the first direction is between the base body in the first direction and the second long side in the first direction.

Semiconductor wafer of monocrystalline silicon and method of producing the semiconductor wafer

Epitaxially coated semiconductor wafers of monocrystalline silicon comprise a p.sup.+-doped substrate wafer and a p-doped epitaxial layer of monocrystalline silicon which covers an upper side face of the substrate wafer; an oxygen concentration of the substrate wafer of not less than 5.3×10.sup.17 atoms/cm.sup.3 and not more than 6.0×10.sup.17 atoms/cm.sup.3; a resistivity of the substrate wafer of not less than 5 mΩcm and not more than 10 mΩcm; and the potential of the substrate wafer to form BMDs as a result of a heat treatment of the epitaxially coated semiconductor wafer, where a high density of BMDs has a maximum close to the surface of the substrate wafer.

Semiconductor wafer of monocrystalline silicon and method of producing the semiconductor wafer

Epitaxially coated semiconductor wafers of monocrystalline silicon comprise a p.sup.+-doped substrate wafer and a p-doped epitaxial layer of monocrystalline silicon which covers an upper side face of the substrate wafer; an oxygen concentration of the substrate wafer of not less than 5.3×10.sup.17 atoms/cm.sup.3 and not more than 6.0×10.sup.17 atoms/cm.sup.3; a resistivity of the substrate wafer of not less than 5 mΩcm and not more than 10 mΩcm; and the potential of the substrate wafer to form BMDs as a result of a heat treatment of the epitaxially coated semiconductor wafer, where a high density of BMDs has a maximum close to the surface of the substrate wafer.

SEMICONDUCTOR DEVICE
20220320324 · 2022-10-06 ·

Provided is a semiconductor device, wherein the buffer region of the semiconductor substrate has a plurality of hydrogen chemical concentration peaks arranged in different positions in the depth direction of the semiconductor substrate, a plurality of doping concentration peaks; and a high concentration region provided between the deepest hydrogen chemical concentration peak and the drift region, wherein the doping concentration distribution of the depth direction of the high concentration region has a slope where the doping concentration gradually decreases toward the drift region, wherein the slope includes a convex portion on top, wherein in an approximate concentration line that approximates a gradient of the slope with a straight line, when the concentration in a depth position of the shallowest doping concentration peak is referred to as the shallowest reference concentration, the doping concentration of the shallowest doping concentration peak is from 5% to 50% of the shallowest reference concentration.

SEMICONDUCTOR DEVICE
20220320324 · 2022-10-06 ·

Provided is a semiconductor device, wherein the buffer region of the semiconductor substrate has a plurality of hydrogen chemical concentration peaks arranged in different positions in the depth direction of the semiconductor substrate, a plurality of doping concentration peaks; and a high concentration region provided between the deepest hydrogen chemical concentration peak and the drift region, wherein the doping concentration distribution of the depth direction of the high concentration region has a slope where the doping concentration gradually decreases toward the drift region, wherein the slope includes a convex portion on top, wherein in an approximate concentration line that approximates a gradient of the slope with a straight line, when the concentration in a depth position of the shallowest doping concentration peak is referred to as the shallowest reference concentration, the doping concentration of the shallowest doping concentration peak is from 5% to 50% of the shallowest reference concentration.

SEMICONDUCTOR DEVICE
20220320288 · 2022-10-06 ·

A semiconductor device, including, a drift region of a first conductivity type provided on a semiconductor substrate; a field stop region of a first conductivity type provided below the drift region and having one or more peaks; and a collector region of a second conductivity type provided below the field stop region, wherein when an integral concentration of the collector region is set to be x [cm.sup.−2], a depth of a first peak that is a shallowest from the back surface of the semiconductor substrate out of the one or more peaks is set to be y1 [μm], line A1: y1=(−7.4699E−01)ln(x)+(2.7810E+01), and line B1: y1=(−4.7772E−01)ln(x)+(1.7960E+01), a depth of the first peak and the integral concentration are within a range between a line A1 and a line B1, is provided.