Patent classifications
H01L31/02325
INTEGRATED CIRCUIT OPTICAL PACKAGE
A cap is mounted to a support substrate, the cap including a cap body and an optical shutter. The cap and support substrate define a housing. An electronic chip is disposed in the housing above the support substrate. A face of the electronic chip supports an optical device that is optically coupled with the optical shutter. The cap body is thermally conductive. Within the housing, a thermally conductive linking structure is coupled in a thermally conductive manner between the cap body and the electronic chip. The thermally conductive linking structure surrounds the electronic chip. A thermal interface material fills a portion of the housing between the thermally conductive linking structure and the cap body.
Three-dimensional image element and optical radar device comprising an optical conversion unit to convert scanned pulse light into fan-like pulse light
A three-dimensional image element and an optical radar device that have low cost and are capable of detecting a distance to a measurement object at a close distance before a final result of counting the number of pulses is acquired are realized. A pixel storage element has a plurality of binary counters that integrate the number of electrical pulses at mutually different timings and the reading of data by a signal processing circuit and the integration are able to be performed in parallel.
SOLAR CELL AND SOLAR CELL MODULE COMPRISING SAME
Disclosed are a solar cell and a solar cell module comprising same, the solar cell comprising: a solar cell structure having one or more hollows passing therethrough in the height direction, and a plurality of light-concentrating parts disposed in each of the one or more hollows.
Housing for an optoelectronic device, and method for producing same, and lid for a housing
The invention relates to a housing for an optoelectronic device and to a method for producing such a housing. For producing a lid for the housing, an infrared-transparent material is used, into which at least one glass window is integrated.
LIDAR WITH MICROLENS ARRAY AND INTEGRATED PHOTONIC SWITCH ARRAY
The present disclosure is directed to imaging LiDARs with optical antennas fed by optical waveguides. The optical antennas can be activated through an optical switch network that connects the optical antennas to a laser source to a receiver. A microlens array is positioned between a lens of the LiDAR system and the optical antennas, the microlens array being positioned so as to transform an emission angle from a corresponding optical antenna to match a chief ray angle of the lens. Methods of use and fabrication are also provided.
MICROSTRUCTURE ENHANCED ABSORPTION PHOTOSENSITIVE DEVICES
Microstructures of micro and/or nano holes on one or more surfaces enhance photodetector optical sensitivity. Arrangements such as a CMOS Image Sensor (CIS) as an imaging LIDAR using a high speed photodetector array wafer of Si, Ge, a Ge alloy on SI and/or Si on Ge on Si, and a wafer of CMOS Logic Processor (CLP) ib Si fi signal amplification, processing and/or transmission can be stacked for electrical interaction. The wafers can be fabricated separately and then stacked or can be regions of the same monolithic chip. The image can be a time-of-flight image. Bayer arrays can be enhanced with microstructure holes. Pixels can be photodiodes, avalanche photodiodes, single photon avalanche photodiodes and phototransistors on the same array and can be Ge or Si pixels. The array can be of high speed photodetectors with data rates of 56 Gigabits per second, Gbps, or more per photodetector.
Method For Manufacturing a Semiconductor Structure Having Group III-V Device on Group IV Substrate and Contacts with Liner Stacks
A semiconductor structure includes a group IV substrate and a patterned group III-V device over the group IV substrate. A blanket dielectric layer is situated over the patterned group III-V device. Contact holes in the blanket dielectric layer are situated over the patterned group III-V device. A liner stack having at least one metal liner is situated in each contact hole. Filler metals are situated over each liner stack and fill the contact holes. The patterned group device can be optically and/or electrically connected to group IV devices in the group IV substrate.
METHODS AND SYSTEM OF ENHANCED NEAR-INFRARED LIGHT ABSORPTION OF IMAGING SYSTEMS USING METASURFACES AND NANOSTRUCTURES
A pixel for an imaging sensor is disclosed that includes a photodetector and a metasurface. The photodetector includes a first surface and sidewalls that extend into the photodetector in a first direction from the first surface. The metasurface is formed on the first surface and includes nanostructures that bend a predetermined range of wavelengths of light at least 70 degrees in opposing angles from a direction that is substantially perpendicular to the first surface, and a standing wave pattern forms in an active region of the pixel. The predetermined range of wavelengths of light includes 700 nm to 1100 nm inclusive. In one embodiment, the pixel is a silicon-based photodetector, a thickness of the pixel in the first direction is less than or equal to 5 μm, and the pixel absorbs at least 20% of a power of the predetermined range of wavelengths of light.
PHOTODIODE BASED ON STANNOUS SELENIDE SULFIDE NANOSHEET/GaAs HETEROJUNCTION AND PREPARATION METHOD AND USE THEREOF
The present disclosure provides a photodiode based on a stannous selenide sulfide nanosheet/GaAs heterojunction and a preparation method and use thereof. The photodiode comprises a structure of the stannous selenide sulfide nanosheet/GaAs heterojunction, forming Au electrodes through thermal vapor deposition on the stannous selenide sulfide nanosheet and GaAs, respectively, and conducting an annealing treatment in a protective gas at a temperature in a range of 150-250° C. The heterojunction is formed by transferring the stannous selenide sulfide nanosheet to a GaAs window, and the GaAs window is obtained by depositing a medium layer film on GaAs and etching the medium layer through lithography and an etchant.
Component carrier with embedded component exposed by blind hole
The present invention relates to an embedded printed circuit board including: an insulation substrate including a cavity; a sensor device disposed on the cavity; an insulating layer disposed on the insulation substrate, having an opening part exposing the sensor device; and a pad part disposed on the lower surface of the opening part exposing the sensor device.