A photoelectric conversion element includes a semiconductor, an intrinsic layer disposed on the semiconductor and containing hydrogenated amorphous silicon, a first-conductivity-type layer that covers a part of the intrinsic layer and contains hydrogenated amorphous silicon of a first conductivity type, a second-conductivity-type layer that covers a part of the intrinsic layer and contains hydrogenated amorphous silicon of a second conductivity type, an insulating film covering an end region of the first-conductivity-type layer, a first electrode disposed on the first-conductivity-type layer, and a second electrode disposed on the second-conductivity-type layer. An end portion of the second-conductivity-type layer is located on the insulating film or above the insulating film.

A photoelectric conversion element includes a semiconductor, an intrinsic layer disposed on the semiconductor and containing hydrogenated amorphous silicon, a first-conductivity-type layer that covers a part of the intrinsic layer and contains hydrogenated amorphous silicon of a first conductivity type, a second-conductivity-type layer that covers a part of the intrinsic layer and contains hydrogenated amorphous silicon of a second conductivity type, an insulating film covering an end region of the first-conductivity-type layer, a first electrode disposed on the first-conductivity-type layer, and a second electrode disposed on the second-conductivity-type layer. An end portion of the second-conductivity-type layer is located on the insulating film or above the insulating film.

A photovoltaic cell may include a hydrogenated amorphous silicon layer including a n-type doped region and a p-type doped region. The n-type doped region may be separated from the p-type doped region by an intrinsic region. The photovoltaic cell may include a front transparent electrode connected to the n-type doped region, and a rear electrode connected to the p-type doped region. The efficiency may be optimized for indoor lighting values by tuning the value of the H2/SiH4 ratio of the hydrogenated amorphous silicon layer.

A photovoltaic cell may include a hydrogenated amorphous silicon layer including a n-type doped region and a p-type doped region. The n-type doped region may be separated from the p-type doped region by an intrinsic region. The photovoltaic cell may include a front transparent electrode connected to the n-type doped region, and a rear electrode connected to the p-type doped region. The efficiency may be optimized for indoor lighting values by tuning the value of the H2/SiH4 ratio of the hydrogenated amorphous silicon layer.

A solar cell apparatus 100 and a method for forming said solar cell apparatus 100, comprising a substrate 101, a n-type transparent conductive oxide (TCO) layer 102 deposited atop said substrate 101, a p-i-n structure 200 that includes a p-type layer 103, an i-type layer 104, a n-type layer 105, a metal back layer 106 deposited atop said n-type layer 105 of the p-i-n structure 200. The n-type layer 105 comprises n-type donors 115 including phosphorus atoms. The n-type donors 115 include oxygen atoms at an atomic concentration comprised between 5% and 25% of the overall atomic composition of the n-type layer 105.

A solar cell apparatus 100 and a method for forming said solar cell apparatus 100, comprising a substrate 101, a n-type transparent conductive oxide (TCO) layer 102 deposited atop said substrate 101, a p-i-n structure 200 that includes a p-type layer 103, an i-type layer 104, a n-type layer 105, a metal back layer 106 deposited atop said n-type layer 105 of the p-i-n structure 200. The n-type layer 105 comprises n-type donors 115 including phosphorus atoms. The n-type donors 115 include oxygen atoms at an atomic concentration comprised between 5% and 25% of the overall atomic composition of the n-type layer 105.

Embodiments of the invention provide a method of forming a group III-V material utilized in thin film transistor devices. In one embodiment, a gallium arsenide based (GaAs) layer with or without dopants formed from a solution based precursor may be utilized in thin film transistor devices. The gallium arsenide based (GaAs) layer formed from the solution based precursor may be incorporated in thin film transistor devices to improve device performance and device speed. In one embodiment, a thin film transistor structure includes a gate insulator layer disposed on a substrate, a GaAs based layer disposed over the gate insulator layer, and a source-drain metal electrode layer disposed adjacent to the GaAs based layer.

Embodiments of the invention provide a method of forming a group III-V material utilized in thin film transistor devices. In one embodiment, a gallium arsenide based (GaAs) layer with or without dopants formed from a solution based precursor may be utilized in thin film transistor devices. The gallium arsenide based (GaAs) layer formed from the solution based precursor may be incorporated in thin film transistor devices to improve device performance and device speed. In one embodiment, a thin film transistor structure includes a gate insulator layer disposed on a substrate, a GaAs based layer disposed over the gate insulator layer, and a source-drain metal electrode layer disposed adjacent to the GaAs based layer.

A solar cell panel includes a first solar cell and a second solar cell; and a plurality of leads connecting the first solar cell and the second solar cell. Each of the first solar cell and the second solar cell includes: a first electrode including a plurality of finger lines in a first direction and a plurality of first bus bars in a second direction crossing the first direction; and a second electrode including a plurality of second bus bars in the second direction. The plurality of leads have a diameter or width of 100 to 500 μm, and include 6 or more leads arranged at one surface side of the first or second solar cell. The plurality of leads are connected to the plurality of first bus bars of the first solar cell and the plurality of second bus bars of the second solar cell by a solder layer, respectively.

A solar cell panel includes a first solar cell and a second solar cell; and a plurality of leads connecting the first solar cell and the second solar cell. Each of the first solar cell and the second solar cell includes: a first electrode including a plurality of finger lines in a first direction and a plurality of first bus bars in a second direction crossing the first direction; and a second electrode including a plurality of second bus bars in the second direction. The plurality of leads have a diameter or width of 100 to 500 μm, and include 6 or more leads arranged at one surface side of the first or second solar cell. The plurality of leads are connected to the plurality of first bus bars of the first solar cell and the plurality of second bus bars of the second solar cell by a solder layer, respectively.