A method of the invention which manufactures a substrate with a transparent conductive film, includes: preparing a base body that has a top surface and a back surface and has an a-Si film coating at least one of the top surface and the back surface; and setting temperatures of the base body and the a-Si film to be in the range of 70 to 220° C. in a film formation space having a processing gas containing hydrogen, applying a sputtering voltage to a target, carrying out DC sputtering, and thereby forming the a-Si film on a transparent conductive film.

A backside emitter solar cell structure having a heterojunction, and a method and a device for producing the same. A backside intrinsic layer is first formed on the back side of the substrate, then a frontside intrinsic layer and a frontside doping layer are formed on the front side of the substrate, and finally a backside doping layer is formed on the back side of the substrate.

Provided are a HJT cell having high photoelectric conversion efficiency and a method for preparing the same. The HJT cell includes an N-type crystalline silicon wafer. An intrinsic amorphous silicon layer, a SiO.sub.2 layer, a C-doped SiO.sub.2 layer, a doped N-type amorphous silicon layer, a TCO conductive layer and an electrode are sequentially disposed on a front surface of the N-type crystalline silicon wafer. An intrinsic amorphous silicon layer, a SiO.sub.2 layer, a C-doped SiO.sub.2 layer, a doped P-type amorphous silicon layer, a TCO conductive layer and an electrode are sequentially disposed on a back surface of the N-type crystalline silicon wafer. The doped P-type amorphous silicon layer includes a lightly B-doped amorphous silicon layer and a heavily B-doped amorphous silicon layer.

Provided is a solar cell and a method for manufacturing the same, the method includes: forming a doped layer on a surface of a semiconductor substrate, the doped layer having a first doping concentration of a doping element in the doped layer; depositing, on a surface of the doped layer, a doped amorphous silicon layer including the doping element; selectively removing at least one region of the doped amorphous silicon layer; performing annealing treatment, for the semiconductor substrate to form a lightly doped region having the first doping concentration and a heavily doped region having a second doping concentration in the doped layer, the second doping concentration is greater than the first doping concentration; and forming a solar cell by post-processing the annealed semiconductor substrate. The solar cell and the method for manufacturing the same simplify the manufacturing process and improve conversion efficiency of the solar cell.

History of commercial production of solar cells made from polysilicon material (E.sub.ff =15 -17%) and from amorphous silicon (Eff = 9 - 12%) has accumulated understanding of deficiencies and limitations of these solar cells. The present design combines following technical requirements: a) ability to harvest energy from widest part of sun spectrum; b) offer highest values of absorption coefficient for photons of the selected part of sun spectrum; c) ensure highest efficiency of conversion of incident photons into electron-hole pairs or photocarriers while ensuring lowest recombination rate; d) The simplicity of fabrication and low cost of mass production.

A photovoltaic cell may include a hydrogenated amorphous silicon layer including a n-type doped region and a p-type doped region. The n-type doped region may be separated from the p-type doped region by an intrinsic region. The photovoltaic cell may include a front transparent electrode connected to the n-type doped region, and a rear electrode connected to the p-type doped region. The efficiency may be optimized for indoor lighting values by tuning the value of the H2/SiH4 ratio of the hydrogenated amorphous silicon layer.

The present invention relates to a solar cell comprising a heterojunction photoelectric device comprising, a front electrode layer, a back electrode layer comprising a metallic contact layer, a light-absorbing silicon layer arranged between said front electrode and said back electrode layers and a doped silicon-based layer arranged between said light-absorbing silicon layer and said back electrode layer, characterized in that said heterojunction photoelectric device further comprises a wide band gap material layer having an electronic band gap greater than 1.4 eV, said wide band gap material layer being applied on a surface of the light-absorbing silicon layer between said light-absorbing silicon layer and said doped silicon-based layer. The present heterojunction layer or stack of layers is compatible with thermal annealing and firing processes at T above 600° C.

An array substrate, a manufacturing method thereof, and a display device are provided. The array substrate includes a display area and a non-display area. The non-display area includes at least one light sensor each including a light blocking layer on a substrate and for blocking light emitted from a backlight source; an insulating layer on the light blocking layer; a amorphous silicon layer on the insulating layer at a location corresponding to the light blocking layer and for sensing external light; an input electrode and an output electrode on the amorphous silicon layer and not contacting each other. The input electrode and the output electrode both contact the amorphous silicon layer, a part of the amorphous silicon layer between the input electrode and the output electrode forms a conductive channel. The output electrode is connected with a photoelectric detection circuit for inputting drain current generated by the conductive channel into the photoelectric detection circuit.

In a method of manufacturing a solar cell, a groove is formed on a first surface of an n-type semiconductor substrate. A p-side transparent conductive film layer is formed on the first surface of the n-type semiconductor substrate formed with the groove. A non-deposition area, where the p-side transparent conductive film layer is not formed, is formed in at least a part of a side surface of the groove formed on the first surface of the n-type semiconductor substrate.

An array substrate of an X-ray sensor and a method for manufacturing the same are provided, the method comprising a step of forming a thin-film transistor element and a photodiode sensor element, wherein the step of forming the thin-film transistor element comprises: forming a gate electrode on an base substrate by a mask process; depositing a gate insulating layer on the base substrate on which the gate electrode is formed; the step of forming the photodiode sensor element comprises: forming an ohmic contact layer on the base substrate through the same mask process while forming the gate electrode; forming a semiconductor layer and a transparent electrode through a mask process on the substrate on which the ohmic contact layer is formed; depositing the gate insulating layer on the base substrate on which the semiconductor layer and the transparent electrode are formed while depositing the gate insulating layer on the base substrate on which the gate electrode is formed. A gate pattern and an ohmic contact layer are formed through the same mask process, and a passivation layer substitutes a channel blocking layer to reduce the number of the mask processes and simplify the manufacturing process and improve throughput and yield of the product.