Patent classifications
H01L33/145
Method for manufacturing display array
A method for manufacturing a display array includes the following steps: providing a substrate and forming a semiconductor stacked layer on the substrate; forming an insulating layer and a plurality of electrode pads on an outer surface of the semiconductor stacked layer, the insulating layer and the electrode pads directly contacting the semiconductor stacked layer, wherein the insulating layer has a plurality of openings, and the electrode pads are respectively located in the openings of the insulating layer and separated by the insulating layer; and transferring the semiconductor stacked layer, the insulating layer and the electrode pads from the substrate to a driving backplane, wherein the electrode pads are respectively electrically connected to a portion of the semiconductor stacked layer and the driving backplane through the openings of the insulating layer to form a plurality of light emitting regions in the semiconductor stacked layer.
Flip-chip light emitting diode structure and manufacturing method thereof
The flip-chip light emitting diode structure includes a substrate, a first patterned current blocking layer, a second patterned current blocking layer, a first semiconductor layer, an active layer and a second semiconductor layer. The first patterned current blocking layer is disposed on the substrate. The second patterned current blocking layer is disposed on the first patterned current blocking layer, in which the first patterned current blocking layer and the second patterned current blocking layer are located on different planes, and patterns of the first patterned current blocking layer and patterns of the second current blocking layer are substantially complementary. The first semiconductor layer is disposed on the second patterned current blocking layer. The active layer is disposed on the first semiconductor layer. The second semiconductor layer is disposed on the active layer, in which electrical properties of the second semiconductor layer and the first semiconductor layer are different.
OPTOELECTRONIC COMPONENT, SEMICONDUCTOR STRUCTURE AND METHOD
A semiconductor structure comprises an n-doped first layer, a p-doped second layer doped with a first dopant, and an active layer disposed between the n-doped first layer and the p-doped second layer and having at least one quantum well. The active layer of the semiconductor structure is divided into a plurality of first optically active regions, at least one second region, and at least one third region. Here, the plurality of first optically active regions are arranged in a hexagonal pattern spaced apart from each other. The at least one quantum well in the active region comprises a larger band gap in the at least one second region than in the plurality of first optically active regions and the at least one third region, the band gap being modified, in particular, by quantum well intermixing. The at least one second region encloses the plurality of first optically active regions.
Visible Light-Emitting Device and Laser with Improved Tolerance to Crystalline Defects and Damage
Visible spectrum quantum dot (QD) light emitting sources integrable with integrated silicon photonics include a plurality of epitaxially grown InP QDs within an active region. The light emitting sources include light emitting diodes (LEDs) and semiconductor lasers.
SEMICONDUCTOR DEVICE
A semiconductor device is provided. The semiconductor device includes a first semiconductor layer; a second semiconductor layer on the first semiconductor layer; an active region between the second semiconductor layer and the first semiconductor layer; an electron blocking structure between the active region and the second semiconductor layer; a first nitride semiconductor layer between the active region and the electron blocking structure, and including indium and aluminum elements; and a second nitride semiconductor layer between the electron blocking structure and the second semiconductor layer, including indium element and devoid of gallium element; wherein the first nitride semiconductor layer has a first indium content, the second nitride semiconductor layer has a second indium content, and the first indium content is greater than the second indium content.
VERTICAL DEEP-ULTRAVIOLET LIGHT-EMITTING DIODE AND METHOD FOR MANUFACTURING SAME
The present disclosure relates to a vertical deep-ultraviolet light-emitting diode and a method for manufacturing the same. The vertical deep-ultraviolet light-emitting diode includes: a conductive substrate, wherein the conductive substrate includes a first surface and a second surface opposite to the first surface; an epitaxial layer, disposed on the first surface of the conductive substrate, and comprising a P-type GaN layer, an electron blocking layer, a quantum well layer and an N-type AlGaN layer that are successively laminated along a direction from the second surface to the first surface, wherein the epitaxial layer has a thickness less than 1 μm; an N-type electrode, disposed on a surface, facing away from the conductive substrate, of the epitaxial layer; and a P-type electrode, disposed on the second surface.
DISPLAY APPARATUS
A display device can include a substrate including a plurality of first sub-pixels, a plurality of second sub-pixels, a plurality of third sub-pixels; a plurality of first semiconductor light emitting devices disposed in the plurality of first sub-pixels, and configured to generate first color light of a first main wave; a plurality of second semiconductor light emitting devices disposed in the plurality of second sub-pixels, and configured to generate second color light of a second main wave; and a plurality of third semiconductor light emitting devices disposed in the plurality of third sub-pixels, and configured to generate third color light of a third main wave, in which at least some of the plurality of first semiconductor light emitting devices have different light emitting regions to compensate for a wave deviation of the first main wave.
MONOLITHIC COLOR-TUNABLE LIGHT EMITTING DIODES AND METHODS THEREOF
A monolithic LED system that is configured to emit a variety of peak wavelengths of light in response to variations in a driving current density includes an n-type region, a p-type region, and a multiple quantum well (MQW) region formed between the n-type region and the p-type region. The MQW region includes parallel layers, each doped with a percentage of Indium to enable a range of light emission between 400 and 600 nm, and one or more V-grooves formed within a portion of the parallel layers. Each of the one or more V-grooves has a lower concentration of the doped percentage of the Indium than other portions of the parallel layers. Transition regions between the one or more V-grooves and the other portions of the parallel layers have a higher concentration of the doped percentage of the Indium which decreases with distance from the one or more V-grooves.
Ultraviolet light emitting diode structures and methods of manufacturing the same
Semiconductor structures involving multiple quantum wells provide increased efficiency of UV and visible light emitting diodes (LEDs) and other emitter devices, particularly at high driving current. LEDs made with the new designs have reduced efficiency droop under high current injection and increased overall external quantum efficiency. The active region of the devices includes separation layers configured between the well layers, the one or more separation regions being configured to have a first mode to act as one or more barrier regions separating a plurality of carriers in a quantum confined mode in each of the quantum wells being provided on each side of the one or more separation layers and a second mode to cause spreading of the plurality of carriers across each of the quantum wells to increase an overlap integral of all of the plurality of carriers. The devices and methods of the invention provide improved efficiency for solid state lighting, including high efficiency ultraviolet LEDs.
Optoelectronic semiconductor chip based on a phosphide compound semiconductor material
An optoelectronic semiconductor chip including a semiconductor layer sequence containing a phosphide compound semiconductor material, wherein the semiconductor layer sequence includes a p-type semiconductor region, an n-type semiconductor region and an active layer disposed between the p-type semiconductor region and the n-type semiconductor region, a current spreading layer including a transparent conductive oxide adjoining the p-type semiconductor region, and a metallic p-connection layer at least regionally adjoining the current spreading layer, wherein the p-type semiconductor region includes a p-contact layer adjoining the current spreading layer, the p-contact layer contains GaP doped with C, a C dopant concentration in the p-contact layer is at least 5*10.sup.19 cm.sup.−3, and the p-contact layer is less than 100 nm thick.