A process for the production of a layer structure of a nitride semiconductor component on a silicon surface, comprising: provision of a substrate having a silicon surface; deposition of an aluminium-containing nitride nucleation layer on the silicon surface of the substrate; optional: deposition of an aluminium-containing nitride buffer layer on the nitride nucleation layer; deposition of a masking layer on the nitride nucleation layer or, if present, on the first nitride buffer layer; deposition of a gallium-containing first nitride semiconductor layer on the masking layer, wherein the masking layer is deposited in such a way that, in the deposition step of the first nitride semiconductor layer, initially separate crystallites grow that coalesce above a coalescence layer thickness and occupy an average surface area of at least 0.16 μm.sup.2 in a layer plane of the coalesced nitride semiconductor layer that is perpendicular to the growth direction.

A full color display includes multiple pixels and has a white point, a direction of emission and a solid angle of emission around the direction of emission characterized by a half-cone angle θ. Each pixel includes: a sub-pixel including a red LED having a first geometry emitting red light into a range of emission angles, such that a fraction of the power emitted within the solid angle of emission is at least 1.2*(1−cos(θ).sup.2); a sub-pixel including a green LED having a second geometry emitting green light into a range of emission angles, such that a fraction of the power emitted within the solid angle of emission is at least 1.2*(1−cos(θ).sup.2); and a sub-pixel including a blue LED emitting blue light into a range of emission angles, such that a fraction of the power emitted within the solid angle of emission is at least 1.2*(1−cos(θ).sup.2). The LEDs are configured such that, in any direction within the solid angle of emission, white light emitted by the display has a chromaticity difference Du′v′ from the white point of the display which is less than 0.01.

A full color display includes multiple pixels and has a white point, a direction of emission and a solid angle of emission around the direction of emission characterized by a half-cone angle θ. Each pixel includes: a sub-pixel including a red LED having a first geometry emitting red light into a range of emission angles, such that a fraction of the power emitted within the solid angle of emission is at least 1.2*(1−cos(θ).sup.2); a sub-pixel including a green LED having a second geometry emitting green light into a range of emission angles, such that a fraction of the power emitted within the solid angle of emission is at least 1.2*(1−cos(θ).sup.2); and a sub-pixel including a blue LED emitting blue light into a range of emission angles, such that a fraction of the power emitted within the solid angle of emission is at least 1.2*(1−cos(θ).sup.2). The LEDs are configured such that, in any direction within the solid angle of emission, white light emitted by the display has a chromaticity difference Du′v′ from the white point of the display which is less than 0.01.

An organic light-emitting display panel has a display area and a non-display area and includes a base substrate, an organic light-emitting layer arranged at a side of the base substrate and including a plurality of light-emitting units, a pixel definition layer including a plurality of first openings, and a microlens layer arranged at a side of the pixel definition layer facing away from the base substrate and including at least one first sub-microlens. One light-emitting unit of the plurality of light-emitting units is located in one of the plurality of first openings. One first sub-microlens of the at least one first sub-microlens protrudes along a direction from the base substrate to the microlens layer. An orthogonal projection of one first sub-microlens of the at least one first sub-microlens on the base substrate overlaps with an orthogonal projection of the pixel definition layer on the base substrate.

An optoelectronic semiconductor component and a method for producing optoelectronic semiconductor components are disclosed. In an embodiment a optoelectronic semiconductor component includes a plurality of semiconductor pillars, each pillar having a tip and a base region at opposite ends, an electrical isolation layer surrounding at least part of the semiconductor pillars on side faces and at least one first electrical contact pad and at least one second electrical contact pad for energizing the semiconductor pillars, wherein a first portion of the semiconductor pillars are emitter pillars configured to generate radiation, wherein a second portion of the semiconductor pillars are non-radiating electrical contact pillars, wherein the contact pillars extend through the isolation layer such that all contact pads are located on the same side of the isolation layer, and wherein each contact pillars is coated with an electrically ohmically conductive outer layer.

An optoelectronic semiconductor component and a method for producing optoelectronic semiconductor components are disclosed. In an embodiment a optoelectronic semiconductor component includes a plurality of semiconductor pillars, each pillar having a tip and a base region at opposite ends, an electrical isolation layer surrounding at least part of the semiconductor pillars on side faces and at least one first electrical contact pad and at least one second electrical contact pad for energizing the semiconductor pillars, wherein a first portion of the semiconductor pillars are emitter pillars configured to generate radiation, wherein a second portion of the semiconductor pillars are non-radiating electrical contact pillars, wherein the contact pillars extend through the isolation layer such that all contact pads are located on the same side of the isolation layer, and wherein each contact pillars is coated with an electrically ohmically conductive outer layer.

A device configured for a treatment with a laser, including a support transparent for the laser and at least one optoelectronic circuit including at least one optoelectronic component having a three-dimensional semiconductor element covered with an active layer, the three-dimensional semiconductor element including a base bonded to the support, the device including a region absorbing for the laser resting on the support and surrounding the base.

A device configured for a treatment with a laser, including a support transparent for the laser and at least one optoelectronic circuit including at least one optoelectronic component having a three-dimensional semiconductor element covered with an active layer, the three-dimensional semiconductor element including a base bonded to the support, the device including a region absorbing for the laser resting on the support and surrounding the base.

A light emitting diode according to an exemplary embodiment of the present disclosure includes: a first conductivity type nitride semiconductor layer; a V-pit generation layer disposed on the n-type nitride semiconductor layer and having a V-pit; a lower active layer disposed on the V-pit generation layer; an upper active layer disposed on the lower active layer; an intermediate layer disposed between the lower active layer and the upper active layer; a second conductivity type nitride semiconductor layer disposed on the upper active layer, an upper step coverage layer disposed between the second conductivity type semiconductor layer and the upper active layer; and a lower step coverage layer disposed between the intermediate layer and the lower active layer, in which in an electroluminescence spectrum, the light emitting diode emits light having a highest peak intensity in a wavelength range of 500 nm or more in a visible light region.

A device includes a substrate, and a plurality of structures supported by the substrate, each structure of the plurality of structures including a Group III-nitride base, first and second Group III-nitride charge carrier injection layers supported by the Group III-nitride base, and a quantum heterostmcture disposed between the first and second charge carrier injection layers. The quantum hetero structure includes a pair of Group III-nitride barrier layers, and a Group III-nitride active layer disposed between the pair of Group III-nitride barrier layers. The Group III-nitride active layer has a thickness for quantum confinement of charge carriers. At least one of the pair of Group III-nitride barrier layers has a nitride surface adjacent to the Group III-nitride active layer.