A semiconductor package assembly is provided. The semiconductor package assembly includes a first semiconductor package. The first semiconductor package includes a first semiconductor die. A first redistribution layer (RDL) structure is coupled to the first semiconductor die and includes a first conductive trace. The semiconductor package assembly also includes a second semiconductor package bonded to the first semiconductor package. The second semiconductor package includes a second semiconductor die. An active surface of the second semiconductor die faces an active surface of the first semiconductor die. A second RDL structure is coupled to the second semiconductor die and includes a second conductive trace. The first conductive trace is in direct contact with the second conductive trace.

A method for bonding a first substrate with a second substrate, characterized in that the first substrate and/or the second substrate is/are thinned before the bonding.

A method for bonding a first substrate with a second substrate, characterized in that the first substrate and/or the second substrate is/are thinned before the bonding.

A method for bonding a first substrate with a second substrate, characterized in that the first substrate and/or the second substrate is/are thinned before the bonding.

A method for bonding a first substrate with a second substrate, characterized in that the first substrate and/or the second substrate is/are thinned before the bonding.

A method of manufacturing a display device includes: immersing a mask including openings, in a solution; seating light-emitting diode chips respectively in the openings of the mask; arranging a first flexible substrate including first wirings thereon, below the mask, and aligning the first wirings to respectively correspond to the openings of the mask; removing from the solution, the first flexible substrate with the first wirings corresponding to the openings of the mask together with the mask with the light-emitting diode chips seated in the openings thereof; bonding the light-emitting diode chips and the first wirings to each other; providing a second flexible substrate including second wirings thereon, and aligning the second wirings to respectively correspond to the light-emitting diode chips; and bonding the light-emitting diode chips and the second wirings to each other, to form the display device.

A method of manufacturing a display device includes: immersing a mask including openings, in a solution; seating light-emitting diode chips respectively in the openings of the mask; arranging a first flexible substrate including first wirings thereon, below the mask, and aligning the first wirings to respectively correspond to the openings of the mask; removing from the solution, the first flexible substrate with the first wirings corresponding to the openings of the mask together with the mask with the light-emitting diode chips seated in the openings thereof; bonding the light-emitting diode chips and the first wirings to each other; providing a second flexible substrate including second wirings thereon, and aligning the second wirings to respectively correspond to the light-emitting diode chips; and bonding the light-emitting diode chips and the second wirings to each other, to form the display device.

A method can include bonding a dummy source die to a first destination site of a destination substrate, wherein the dummy source die has a metrology pattern, and the first destination site has a metrology pattern. The method can further include collecting radiation data regarding at least portions of the metrology pattern and the metrology pattern within a radiation area, wherein collecting the radiation data is performed after bonding the dummy source die to the first destination site. The method can include analyzing the radiation data to determine an overlay error between the dummy source die and the first destination site; and adjusting a position of a known good source die or a second destination site of the destination substrate to compensate for the overlay error between the dummy source die and the first destination site.

A method for probing power contact pads on an integrated circuit (IC) die are disclosed. The method includes depositing a probing bump over multiple vias. The vias may be directly exposed or include an exposed contact pad. The method also includes forming a probing bump over and in electric contact with multiple vias. Optionally, the probing bump may be removed after probing.

A method for bonding chips onto a substrate or onto further chips. The chips are bonded onto the substrate or the further chips by means of a direct bond.