H01L2224/83001

SEMICONDUCTOR PACKAGE

A semiconductor package includes an interposer, a semiconductor die, an underfill layer and an encapsulant. The semiconductor die is disposed over and electrically connected with the interposer, wherein the semiconductor die has a front surface, a back surface, a first side surface and a second side surface, the back surface is opposite to the front surface, the first side surface and the second side surface are connected with the front surface and the back surface, and the semiconductor die comprises a chamfered corner connected with the back surface, the first side surface and the second side surface, the chamfered corner comprises at least one side surface. The underfill layer is disposed between the front surface of the semiconductor die and the interposer. The encapsulant laterally encapsulates the semiconductor die and the underfill layer, wherein the encapsulant is in contact with the chamfered corner of the semiconductor die.

SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
20230148218 · 2023-05-11 ·

A semiconductor package includes a semiconductor chip; a redistribution insulating layer including a first opening; an external connection bump including a first part in the first opening; a lower bump pad including a first surface in physical contact with the first part of the external connection bump and a second surface opposite to the first surface, wherein the first surface and the redistribution insulating layer partially overlap; and a redistribution pattern that electrically connects the lower bump pad to the semiconductor chip.

LIGHT-EMITTING DEVICE, MANUFACTURING METHOD THEREOF AND DISPLAY MODULE USING THE SAME
20230207769 · 2023-06-29 ·

A light-emitting device includes a carrier, a light-emitting element and a connection structure. The carrier includes a first electrical conduction portion. The light-emitting element includes a first light-emitting layer capable of emitting first light and a first contact electrode formed under the light-emitting layer. The first contact electrode is corresponded to the first electrical conduction portion. The connection structure includes a first electrical connection portion and a protective portion surrounding the first contact electrode and the first electrical connection portion. The first electrical connection portion includes an upper portion, a lower portion and a neck portion arranged between the upper portion and the lower portion. An edge of the upper portion is protruded beyond the neck portion, and an edge of the lower portion is protruded beyond the upper portion.

Temporary protective film for semiconductor encapsulation molding, lead frame provided with temporary protective film, encapsulated molded body provided with temporary protective film, and method for manufacturing semiconductor device

A temporary protective film for semiconductor sealing molding includes a support film and an adhesive layer provided on one surface or both surfaces of the support film and containing a resin and a silane coupling agent. The content of the silane coupling agent in the temporary protective film may be more than 5% by mass and less than or equal to 35% by mass with respect to the total mass of the resin.

METHOD OF MANUFACTURING MOUNTING SUBSTRATE AND MOUNTING SUBSTRATE MANUFACTURING APPARATUS
20170354041 · 2017-12-07 ·

A method of manufacturing a mounting substrate includes a provisional pressing process, a driver pressing process, and a flexible printed circuit board pressing process. In the provisional pressing process, a driver 40 and a flexible printed circuit board are provisionally pressed. In the driver pressing process, the driver 40 is thermally pressed with using a pressing head 52 having a driver pressing surface 53 and a flexible printed circuit board pressing surface 54, and pressure force is applied to the driver 40 with elastically deforming a buffer 57. In the flexible printed circuit board pressing process, the pressing head 52 is moved closer to the glass substrate GS such that a height level of the flexible printed circuit board pressing surface 54 with respect to a mounting surface 21 and a height level of the driver pressing surface 53 with respect to the mounting surface 21 are same and pressure force is applied to the flexible printed circuit board 30 with elastically deforming the buffer 57.

Package structure and manufacturing method thereof

A package structure includes a redistribution layer, a chip assembly, a plurality of solder balls, and a molding compound. The redistribution layer includes redistribution circuits, photoimageable dielectric layers, conductive through holes, and chip pads. One of the photoimageable dielectric layers located on opposite two outermost sides has an upper surface and openings. The chip pads are located on the upper surface and are electrically connected to the redistribution circuits through the conductive through holes. The openings expose portions of the redistribution circuits to define solder ball pads. Line widths and line spacings of the redistribution circuits decrease in a direction from the solder ball pads towards the chip pads. The chip assembly is disposed on the chip pads and includes at least two chips with different sizes. The solder balls are disposed on the solder ball pads, and the molding compound at least covers the chip assembly.

SEMICONDUCTOR PACKAGE
20220375808 · 2022-11-24 ·

A semiconductor package includes: a first semiconductor chip including a first surface and a second surface opposite to each other and including first through electrodes; at least a second semiconductor chip stacked on the first surface of the first semiconductor chip and comprising second through electrodes electrically connected to the first through electrodes; and a molding layer contacting the first surface of the first semiconductor chip and a side wall of the at least one second semiconductor chip and including a first external side wall connected to and on the same plane as a side wall of the first semiconductor chip, wherein the first external side wall of the molding layer extends to be inclined with respect to a first direction orthogonal to the first surface of the first semiconductor chip, and both the external first side wall of the molding layer and the side wall of the first semiconductor chip have a first slope that is the same for both the first external side wall of the molding layer and the side wall of the first semiconductor chip.

Adsorption device, transferring system having same, and transferring method using same

A transferring method includes providing an adsorption device, using the adsorption device to attract and hold a plurality of light emitting diodes (LEDs), providing a target substrate with a plurality of spots of anisotropic conductive adhesive on a surface of the target substrate; moving the adsorption device or the target substrate wherein each of the plurality of LEDs adsorbed by the adsorption device becomes in contact with one of the plurality of spots of anisotropic conductive adhesive; and curing the plurality of spots of anisotropic conductive adhesive on the target substrate and moving away the adsorption device.

LIGHT EMITTING DEVICE FOR DISPLAY AND LIGHT EMITTING PACKAGE HAVING THE SAME
20220359474 · 2022-11-10 ·

A light emitting device for a display including: a base layer; a first LED sub-unit, a second LED sub-unit, and a third LED sub-unit on the base layer; and a supporting layer covering the first LED sub-unit, the second LED sub-unit, and the third LED sub-unit, in which the third LED sub-unit is configured to emit light having a shorter wavelength than that of light emitted from the first LED sub-unit, and to emit light having a longer wavelength than that of light emitted from the second LED sub-unit, and a luminous intensity ratio of light emitted from the third LED sub-unit and the second LED sub-unit is configured to be about 6:1.

Wafer level package

Provided are a wafer level package and a method of manufacturing the same, wherein an underfill sufficiently fills a space between a redistribution substrate and a semiconductor chip, thereby reducing warpage. The wafer level package includes a redistribution substrate including at least one redistribution layer (RDL), a semiconductor chip on the redistribution substrate, and an underfill filling a space between the redistribution substrate and the semiconductor chip. The underfill covers side surfaces of the semiconductor chip. The redistribution substrate includes a trench having a line shape and extending in a first direction along a first side surface of the semiconductor chip.