Patent classifications
H01L2224/83009
DBI to Si bonding for simplified handle wafer
Devices and techniques include process steps for preparing various microelectronic components for bonding, such as for direct bonding without adhesive. The processes include providing a first bonding surface on a first surface of the microelectronic components, bonding a handle to the prepared first bonding surface, and processing a second surface of the microelectronic components while the microelectronic components are gripped at the handle. In some embodiments, the processes include removing the handle from the first bonding surface, and directly bonding the microelectronic components at the first bonding surface to other microelectronic components.
Metal nanoparticles in an amorphous bonding layer between a device substrate and carrier substrate
A method for manufacturing a semiconductor structure includes: forming a first bonding layer on a device substrate, the first bonding layer including a first bonding sub-layer and a second bonding sub-layer, the first bonding sub-layer including a first metal oxide material in an amorphous state and a plurality of metal nanoparticles, the second bonding sub-layer including a second metal oxide material in an amorphous state; forming a second bonding layer on a carrier substrate, the second bonding layer including a third metal oxide material in an amorphous state; conducting a surface modification process on the first and second bonding layers; bonding the device and carrier substrates to each other through the first and second bonding layers; and annealing the first and second bonding layers to convert the first, second, and third metal oxide materials from the amorphous state to a crystalline state.
Method of Electronic Devices Packaging Underfill
The present disclosure relates to a method of electronic devices packaging underfill, the method of electronic devices packaging underfill according to the present disclosure includes a step of loading a substrate, where an electronic device is stacked, on a stage; a step of transferring heat so that the substrate maintains a constant temperature; a step of transferring heat so that a dispenser that discharges a filler maintains a constant temperature; a step of applying a liquid filler for underfilling to a side surface of the electronic device using the dispenser; and a step of discharging a gas towards the filler applied to the side surface of the electronic device using a gas discharger in order to pressurize the filler in a capillary flow direction.
PACKAGE STRUCTURE AND PACKAGING METHOD
A package structure includes a substrate, a chip disposed on the substrate and having a backside surface away from the substrate, a heat sink disposed above the substrate and having a surface facing the back side surface, and a thermal interface material disposed between the chip and the heat sink. There is no organic adhesive between the chip and the heat sink. A method for forming the package structure is also provided.