An electronic device, such as a filter, includes a first substrate having a bottom surface and a top surface, a first side wall of a certain height being formed along a periphery of the bottom surface to surround an electronic circuit disposed on the bottom surface, an external electrode formed on the top surface, the external electrode being connected to the electronic circuit by a via communicating with the bottom surface and a second substrate. The second substrate has a second side wall of a certain height formed along a periphery of a top surface, the second side wall being aligned and bonded with the first side wall to internally form a cavity defined between the bottom surface of the first substrate, the top surface of the second substrate, the first side wall, and the second side wall.

A system and method for clamping wafers together in alignment using pressure. The system and method involves holding a first wafer and a second wafer together in alignment using a wafer clamp within an ambient environment maintained at a first pressure and creating a second pressure at least partially around and between the first wafer and the second wafer held together by the wafer clamp, wherein the first pressure is greater than the second pressure. The first wafer and the second wafer are clamped together in alignment using a pneumatic force created by a pressure differential between the first pressure and the second pressure.

A wafer-to-wafer bonding structure includes a first wafer including a first conductive pad in a first insulating layer and a first barrier layer surrounding a lower surface and side surfaces of the first conductive pad, a second wafer including a second conductive pad in a second insulating layer and a second barrier layer surrounding a lower surface and side surfaces of the second conductive pad, the second insulating layer being bonded to the first insulating layer, and at least a portion of an upper surface of the second conductive pad being partially or entirely bonded to at least a portion of an upper surface of the first conductive pad, and a third barrier layer between portions of the first and second wafers where the first and second conductive pads are not bonded to each other.

A method includes determining a first offset between a first alignment mark on a first side of a first wafer and a second alignment mark on a second side of the first wafer; aligning the first alignment mark of the first wafer to a third alignment mark on a first side of a second wafer, which includes detecting a location of the second alignment mark of the first wafer; determining a location of the first alignment mark of the first wafer based on the first offset and the location of the second alignment mark of the first wafer; and, based on the determined location of the first alignment mark, repositioning the first wafer to align the first alignment mark to the third alignment mark; and bonding the first side of the first wafer to the first side of the second wafer to form a bonded structure.

Methods and systems of bonding substrates include disposing a low melting point material and one or more high melting point materials having a higher melting temperature than a melting temperature of the low melting point material between a first substrate and a second substrate to form a substrate assembly including a contacting surface comprising first and second areas; applying a first force at the first area; and applying heat to form a bond layer between the first and second substrates. A first formed porosity of the bond layer is aligned with the first area of the contacting surface. A second formed porosity of the bond layer is aligned with the second area of the contacting surface to which the first force was not applied, and the first formed porosity is different from the second formed porosity.

A method of making an electronic device having a discrete device mounted on a surface of an electronic die with both the discrete device and the die connected by heat cured conductive ink and covered with cured encapsulant including placing the discrete device on the die; and keeping the temperature of each of the discrete device and the die below about 200 C. Also disclosed is a method of electrically attaching a discrete device to a substrate that includes placing the device on the substrate, applying conductive ink that connects at least one terminal on the device to at least one contact on the substrate and curing the conductive ink. Also disclosed is an IC package with a discrete electrical device having electrical terminals; an electrical substrate having contact pads on a surface thereof; and cured conductive ink connecting at least one of the electrical terminals with at least one of the contact pads.

A method of making an electronic device having a discrete device mounted on a surface of an electronic die with both the discrete device and the die connected by heat cured conductive ink and covered with cured encapsulant including placing the discrete device on the die; and keeping the temperature of each of the discrete device and the die below about 200 C. Also disclosed is a method of electrically attaching a discrete device to a substrate that includes placing the device on the substrate, applying conductive ink that connects at least one terminal on the device to at least one contact on the substrate and curing the conductive ink. Also disclosed is an IC package with a discrete electrical device having electrical terminals; an electrical substrate having contact pads on a surface thereof; and cured conductive ink connecting at least one of the electrical terminals with at least one of the contact pads.

Structures and methods are disclosed for fabricating optoelectronic solid state array devices. In one case a backplane and array of micro devices is aligned and connected through bumps.

Structures and methods are disclosed for fabricating optoelectronic solid state array devices. In one case a backplane and array of micro devices is aligned and connected through bumps.

A microelectronic assembly includes a first substrate having a surface and a first conductive element and a second substrate having a surface and a second conductive element. The assembly further includes an electrically conductive alloy mass joined to the first and second conductive elements. First and second materials of the alloy mass each have a melting point lower than a melting point of the alloy. A concentration of the first material varies in concentration from a relatively higher amount at a location disposed toward the first conductive element to a relatively lower amount toward the second conductive element, and a concentration of the second material varies in concentration from a relatively higher amount at a location disposed toward the second conductive element to a relatively lower amount toward the first conductive element.