H01L2224/838

Chip wiring method and structure

A chip connection method and structure are provided. The method includes: providing a first connection line and a second connection line on a substrate, wherein, in the thickness direction of the substrate, a distance between the first connection line and the chip is smaller than a distance between the second connection line and the chip; providing the chip on a top surface of the substrate, the chip being provided with at least two chip pins; and providing the substrate with a second through hole corresponding to the second connecting line and provided therein with a second conductive layer, at least one chip pin being electrically connected to the first connection line, and at least one of the remaining chip pin being corresponding to a first opening of the second through, and the second conductive layer electrically connecting the chip pin and the second connection line.

CONNECTION STRUCTURE
20200343211 · 2020-10-29 ·

A method for manufacturing connection structure, the method includes arranging conductive particles and a first composite on a first electrode located on a first surface of a first member, arranging a second composite on the first electrode and a region other than the first electrode of the first surface, arranging the first surface and a second surface of a second member where a second electrode is located, so that the first electrode and the second electrode are opposed to each other, pressing the first member and the second member, and curing the first composite and the second composite.

OPTICAL DEVICE LAYER TRANSFERRING METHOD
20200343405 · 2020-10-29 ·

A transferring method of transferring a plurality of optical device layers includes a transfer member bonding step, a buffer layer breaking step, a first optical device layer transferring step, an adhesive removing step, and a second optical device layer transferring step. In the transfer member bonding step, an optical device wafer and a transfer member are bonded to each other through an adhesive, and each spacing between adjacent ones of the optical device layers of the optical device wafer which each have been divided in a chip size is filled with the adhesive. In the adhesive removing step, at least part of the adhesive with which each spacing between the adjacent ones of the optical device layers has been filled is removed such that the optical device layers which have been embedded in an adhesive layer in the transfer member bonding step project from the adhesive layer.

OPTICAL DEVICE LAYER TRANSFERRING METHOD
20200343405 · 2020-10-29 ·

A transferring method of transferring a plurality of optical device layers includes a transfer member bonding step, a buffer layer breaking step, a first optical device layer transferring step, an adhesive removing step, and a second optical device layer transferring step. In the transfer member bonding step, an optical device wafer and a transfer member are bonded to each other through an adhesive, and each spacing between adjacent ones of the optical device layers of the optical device wafer which each have been divided in a chip size is filled with the adhesive. In the adhesive removing step, at least part of the adhesive with which each spacing between the adjacent ones of the optical device layers has been filled is removed such that the optical device layers which have been embedded in an adhesive layer in the transfer member bonding step project from the adhesive layer.

PACKAGED DIES WITH METAL OUTER LAYERS EXTENDING FROM DIE BACK SIDES TOWARD DIE FRONT SIDES

A method of wafer dicing includes singulating dies from a semiconductor wafer. The method further includes depositing a metal layer on back sides of the singulated dies, wherein a portion of the metal layer continues beyond the backs sides of the singulated dies to deposit at least partially on lateral sides of the singulated dies. A packaged die includes a semiconductor die and a metal outer layer deposited on the back side of the semiconductor die and on a portion of the lateral side of the semiconductor die nearest the back side. The packaged die further includes a substrate mounted to the back side of the semiconductor die a die attach material that bonds the substrate to the metal outer layer deposited on the semiconductor die, wherein the metal outer layer and the die attach material surround the back edge of the semiconductor die.

Connection structure
10804235 · 2020-10-13 · ·

A method for manufacturing connection structure, the method includes arranging conductive particles and a first composite on a first electrode located on a first surface of a first member, arranging a second composite on the first electrode and a region other than the first electrode of the first surface, arranging the first surface and a second surface of a second member where a second electrode is located, so that the first electrode and the second electrode are opposed to each other, pressing the first member and the second member, and curing the first composite and the second composite.

Video wall module and method of producing a video wall module
10797026 · 2020-10-06 · ·

A video wall module includes a plurality of light emitting diode chips, each including first contact electrodes and second contact electrodes arranged at a contact side, wherein the light emitting diode chips are arranged at a top side of a multilayer circuit board, and the contact electrodes electrically conductively connect to a first metallization layer arranged at the top side of the circuit board.

ASICS face to face self assembly

A die structure includes a first die having a first surface and a second surface opposite the first surface. The first die includes sidewalls extending between the first and second surfaces. The die structure includes conductive ink printed traces including a first group of the conductive ink printed traces on the first surface of the first semiconductor die. A second group of the conductive ink printed traces are on the second surface of the semiconductor die, and a third group of the conductive ink printed traces are on the sidewalls of the semiconductor die.

PACKAGED INTEGRATED CIRCUIT DEVICES WITH THROUGH-BODY CONDUCTIVE VIAS, AND METHODS OF MAKING SAME
20200279834 · 2020-09-03 ·

A device is disclosed which includes at least one integrated circuit die, at least a portion of which is positioned in a body of encapsulant material, and at least one conductive via extending through the body of encapsulant material.

Packaged semiconductor components having substantially rigid support members

Packaged semiconductor components having substantially rigid support member are disclosed. The packages can include a semiconductor die and a support member proximate to the semiconductor die. The support member is at least substantially rigid. The packages can further include an adhesive between the support member and the semiconductor die and adhesively attaching the support member to the semiconductor die. The packages can also include a substrate carrying the semiconductor die and the support member attached to the semiconductor die.