An inventive composition and process for formation of a conductive bonding film are disclosed. The invention combines adhesive bonding sheet technologies (e.g. die attach films, or DAFs) with the electrical and thermal conductivity performance of transient liquid phase sintered paste compositions. The invention films are characterized by high bulk thermal and electrical conductivity within the film as well as low and stable thermal and electrical resistance at the interfaces between the inventive film and metallized adherends.

The present invention relates to a bonding method for connecting a first wafer and a second wafer, wherein firstly a first adhesive layer is deposited onto a surface of the first wafer. Furthermore, a second adhesive layer is deposited onto the first adhesive layer, and the two adhesive layers are structured by way of selective removal of both adhesive layers in at least one predefined region of the first wafer, Moreover, the first wafer is connected to the second wafer by way of pressing a surface of the second wafer onto the second adhesive layer, wherein the second adhesive layer is more flowable that the first adhesive layer on connecting the first wafer to the second wafer.

The present invention relates to a bonding method for connecting a first wafer and a second wafer, wherein firstly a first adhesive layer is deposited onto a surface of the first wafer. Furthermore, a second adhesive layer is deposited onto the first adhesive layer, and the two adhesive layers are structured by way of selective removal of both adhesive layers in at least one predefined region of the first wafer, Moreover, the first wafer is connected to the second wafer by way of pressing a surface of the second wafer onto the second adhesive layer, wherein the second adhesive layer is more flowable that the first adhesive layer on connecting the first wafer to the second wafer.

A connection structure including: a first circuit member having a plurality of first electrodes; a second circuit member having a plurality of second electrodes; and an intermediate layer having a plurality of bonding portions electrically connecting the first electrodes and the second electrodes, in which at least one of the first electrode and the second electrode that are connected by the bonding portion is a gold electrode, and 90% or more of the plurality of bonding portions include a first region containing a tin-gold alloy and connecting the first electrode and the second electrode and a second region containing bismuth and being in contact with the first region.

The invention relates to a power module (1) comprising a substrate (2). an electrically conductive intermediate layer (3) which is arranged on the substrate (2) and which has a joining region (4) produced by means of sintering, and at least one power component (5) which is arranged on the intermediate layer (3) and the sintered joining region (4) and is connected thereto (in particular at the load connection of the power component (5)) and which has at least one connection point (6) (e.g. a control connection) connected to the intermediate layer (3), wherein the intermediate layer (3) has. in the region of the associated connection point (6). a solder region (7) produced by means of a solder preform and spaced and/or electrically insulated from the sintered joining region (4). The large active surface, which is subjected to high thermomechanical stress in the service life test. can therefore be connected via the sintered joining region (4), which ensures an especially long-lasting, reliable and resilient mechanical connection between the associated power component (5) and the substrate (2). At the associated connection point (6), e.g. the gate of a transistor, the thermomechanical stress is usually much less, which is why there in the intermediate layer (3) a solder preform can be used for producing the connection between the associated power component (5) and the substrate (2), such solder preforms being relatively cost-effectively obtainable. Furthermore. an electrical device (10) has at least one such power module (1). The joining region (4) produced by means of sintering can be formed by means of a sinter preform or by means of 3D printing. by means of a coating method or by means of screen printing/stencil printing. In the method for producing the power module (1). the intermediate layer (3) can be heated to the melting temperature of the solder if the melting temperature of the solder is higher than the sintering temperature or to the sintering temperature if the sintering temperature is higher than the melting temperature of the solder, and the layer thickness (9) of the sintering material for the joining region (4) produced by means of sintering can be larger or smaller than the layer thickness (9) of the solder for the associated solder region (7) if the sintering temperature is correspondingly lower or higher than the melting temperature of the solder. Alternatively. the melting temperature of the solder can be substantially t

The invention relates to a power module (1) comprising a substrate (2). an electrically conductive intermediate layer (3) which is arranged on the substrate (2) and which has a joining region (4) produced by means of sintering, and at least one power component (5) which is arranged on the intermediate layer (3) and the sintered joining region (4) and is connected thereto (in particular at the load connection of the power component (5)) and which has at least one connection point (6) (e.g. a control connection) connected to the intermediate layer (3), wherein the intermediate layer (3) has. in the region of the associated connection point (6). a solder region (7) produced by means of a solder preform and spaced and/or electrically insulated from the sintered joining region (4). The large active surface, which is subjected to high thermomechanical stress in the service life test. can therefore be connected via the sintered joining region (4), which ensures an especially long-lasting, reliable and resilient mechanical connection between the associated power component (5) and the substrate (2). At the associated connection point (6), e.g. the gate of a transistor, the thermomechanical stress is usually much less, which is why there in the intermediate layer (3) a solder preform can be used for producing the connection between the associated power component (5) and the substrate (2), such solder preforms being relatively cost-effectively obtainable. Furthermore. an electrical device (10) has at least one such power module (1). The joining region (4) produced by means of sintering can be formed by means of a sinter preform or by means of 3D printing. by means of a coating method or by means of screen printing/stencil printing. In the method for producing the power module (1). the intermediate layer (3) can be heated to the melting temperature of the solder if the melting temperature of the solder is higher than the sintering temperature or to the sintering temperature if the sintering temperature is higher than the melting temperature of the solder, and the layer thickness (9) of the sintering material for the joining region (4) produced by means of sintering can be larger or smaller than the layer thickness (9) of the solder for the associated solder region (7) if the sintering temperature is correspondingly lower or higher than the melting temperature of the solder. Alternatively. the melting temperature of the solder can be substantially t

Representative implementations of techniques and methods include chemical mechanical polishing for hybrid bonding. The disclosed methods include depositing and patterning a dielectric layer on a substrate to form openings in the dielectric layer, depositing a barrier layer over the dielectric layer and within a first portion of the openings, and depositing a conductive structure over the barrier layer and within a second portion of the openings not occupied by the barrier layer, at least a portion of the conductive structure in the second portion of the openings coupled or contacting electrical circuitry within the substrate. Additionally, the conductive structure is polished to reveal portions of the barrier layer deposited over the dielectric layer and not in the second portion of the openings. Further, the barrier layer is polished with a selective polish to reveal a bonding surface on or at the dielectric layer.

The purpose of the present invention is to provide a conductive copper paste which is curable in an ambient atmosphere, has a long pot life, and, has a low specific resistance even under a high-temperature and short-time curing condition, wherein the specific resistance after curing does not greatly vary depending on a copper powder content. The conductive copper paste provided is characterized by containing (A) a copper powder, (B) a thermosetting resin, (C) a fatty acid that is liquid at normal temperature, and (D) triethanolamine. Preferably, component (B) is a resol-type phenol resin. More preferably, the content of component (B) is 10 to 20 parts by mass with respect to a total of 100 parts by mass of component (A) and component (B).

The purpose of the present invention is to provide a conductive copper paste which is curable in an ambient atmosphere, has a long pot life, and, has a low specific resistance even under a high-temperature and short-time curing condition, wherein the specific resistance after curing does not greatly vary depending on a copper powder content. The conductive copper paste provided is characterized by containing (A) a copper powder, (B) a thermosetting resin, (C) a fatty acid that is liquid at normal temperature, and (D) triethanolamine. Preferably, component (B) is a resol-type phenol resin. More preferably, the content of component (B) is 10 to 20 parts by mass with respect to a total of 100 parts by mass of component (A) and component (B).

Representative implementations of techniques and methods include chemical mechanical polishing for hybrid bonding. The disclosed methods include depositing and patterning a dielectric layer on a substrate to form openings in the dielectric layer, depositing a barrier layer over the dielectric layer and within a first portion of the openings, and depositing a conductive structure over the barrier layer and within a second portion of the openings not occupied by the barrier layer, at least a portion of the conductive structure in the second portion of the openings coupled or contacting electrical circuitry within the substrate. Additionally, the conductive structure is polished to reveal portions of the barrier layer deposited over the dielectric layer and not in the second portion of the openings. Further, the barrier layer is polished with a selective polish to reveal a bonding surface on or at the dielectric layer.