Patent classifications
H01L2224/85986
SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME
Disclosed are semiconductor packages and their fabrication methods. The semiconductor package comprises a substrate including substrate pads, a first semiconductor chip mounted on the substrate and including first chip pads arranged in a first direction of the first semiconductor chip, and a first wire group that connects the substrate pads to the first chip pads and includes a first power/ground wire, a first signal wire, a second signal wire, and a second power/ground wire that are arranged in a second direction that is orthogonal to the first direction. A first top end of the first signal wire is closer horizontally to the first chip pads than is a second top end of the second signal wire.
Semiconductor device having conductive wire with increased attachment angle and method
A semiconductor device includes a shielding wire formed across a semiconductor die and an auxiliary wire supporting the shielding wire, thereby reducing the size of a package while shielding the electromagnetic interference generated from the semiconductor die. In one embodiment, the semiconductor device includes a substrate having at least one circuit device mounted thereon, a semiconductor die spaced apart from the circuit device and mounted on the substrate, a shielding wire spaced apart from the semiconductor die and formed across the semiconductor die, and an auxiliary wire supporting the shielding wire under the shielding wire and formed to be perpendicular to the shielding wire. In another embodiment, a bump structure is used to support the shielding wire. In a further embodiment, an auxiliary wire includes a bump structure portion and wire portion and both the bump structure portion and the wire portion are used to support the shielding wire.
BALL BOND IMPEDANCE MATCHING
Methods and apparatus for providing an interconnection including a stack of wirebond balls having a selected impedance. The wirebond balls may have a size, which may comprise a radius, configured for the selected impedance. The stack may comprise a number of wirebond balls configured for the selected impedance and/or may comprise a material selected for the selected impedance. In embodiments, the selected impedance is primarily resistive (e.g., 50 Ohms), such that the overall reactance is minimized.
EX-SITU MANUFACTURE OF METAL MICRO-WIRES AND FIB PLACEMENT IN IC CIRCUITS
A method includes attaching a first portion of a preformed metal micro-wire to a multilayer structure. The preformed metal micro-wire has a diameter of 10 microns or less. The method also includes attaching a second portion of the preformed metal micro-wire to the multilayer structure.
STRENGTHENED WIRE-BOND
An electrical circuit in a semiconductor package may include a wire connected at each end by a bond point formed using a wire-bonding machine. When a connection point (e.g., a die pad) has a very small dimension, the wire used for the circuit may be required to have a similarly small diameter. This small diameter can lead to a weak bond point, especially in bonds that include a heel portion. The heel portion is a transition region of the bond point that may have less strength (e.g., as measure by a pull-test) than other portions of the bond point and/or may be exposed to more forces than other portions of the bond point. Accordingly, a capping-bond point may be applied to the bond point to strengthen the bond point by clamping the heel portion and shielding it from forces that could cause cracks.
Electrical coupling assemblies and methods for optoelectronic modules
In one example embodiment, a PCBA, an optoelectronic module, an electrical coupling, and/or a high speed interconnect may include a first contact pad, a second contact pad adjacent to and spaced apart from the first contact pad, a first wire coupled to the first contact pad via a first ball bump, and a second wire coupled to the second contact pad via a double ball bump.
Semiconductor package with a wire bond mesh
A semiconductor package includes a lead frame having a die attach pad and a plurality of leads. A die is attached to the die attach pad and the electrically connected to the plurality of leads. The die includes a plurality of bond pads along a periphery of the die and a bond pad strip surrounding a circuit in the die. A first plurality of bond wires is bonded between first opposite sides of the bond pad strip. The first plurality of bond wires is aligned in a first direction. A second plurality of bond wires is bonded between second opposite sides of the bond pad strip. The second plurality of bond wires is aligned in a second direction. Mold compound covers portions of the lead frame, the die, the bond pad strip, the first plurality of bond wires and the second plurality of bond wires.
Semiconductor device assemblies including multiple shingled stacks of semiconductor dies
A semiconductor device assembly includes a substrate having a plurality of external connections, a first shingled stack of semiconductor dies disposed directly over a first location on the substrate and electrically coupled to a first subset of the plurality of external connections, and a second shingled stack of semiconductor dies disposed directly over a second location on the substrate and electrically coupled to a second subset of the plurality of external connections. The semiconductor device assembly further includes an encapsulant at least partially encapsulating the substrate, the first shingled stack and the second shingled stack.
Bond wire support systems and methods
A system includes a substrate; a bond pad; a wire spanning above the substrate, having a first end bonded to the bond pad and a second end extending from the bond pad to terminate in a second end thereof; and a support structure disposed on the substrate, the support structure comprising at least a side wall and extending from the substrate to terminate in an end portion spaced from the substrate to support the wire.
SEMICONDUCTOR DEVICE HAVING CONDUCTIVE WIRE WITH INCREASED ATTACHMENT ANGLE AND METHOD
A semiconductor device includes a shielding wire formed across a semiconductor die and an auxiliary wire supporting the shielding wire, thereby reducing the size of a package while shielding the electromagnetic interference generated from the semiconductor die. In one embodiment, the semiconductor device includes a substrate having at least one circuit device mounted thereon, a semiconductor die spaced apart from the circuit device and mounted on the substrate, a shielding wire spaced apart from the semiconductor die and formed across the semiconductor die, and an auxiliary wire supporting the shielding wire under the shielding wire and formed to be perpendicular to the shielding wire. In another embodiment, a bump structure is used to support the shielding wire. In a further embodiment, an auxiliary wire includes a bump structure portion and wire portion and both the bump structure portion and the wire portion are used to support the shielding wire.