Implementations of semiconductor packages may include a die having a first side and a second side opposite the first side, a first metal layer coupled to the first side of the die, a tin layer coupled to the first metal layer, the first metal layer between the die and the tin layer, a backside metal layer coupled to the second side of the die, and a mold compound coupled to the die. The mold compound may cover a plurality of sidewalls of the first metal layer and a plurality of sidewalls of the tin layer and a surface of the mold compound is coplanar with a surface of the tin layer.

A MEMS transducer package (1) comprises a semiconductor die element (3) and a cap element (23). The semiconductor die element (3) and cap element (23) have mating surfaces (9, 21). The semiconductor die element (3) and cap element (23) are configured such that when the semiconductor die element (3) and cap element (4) are conjoined, a first volume (7, 27) is formed through the semiconductor die element (3) and into the semiconductor cap element (23), and an acoustic channel is formed to provide an opening between a non-mating surface (11) of the semiconductor die element (3) and either a side surface (10, 12) of the transducer package or a non-mating surface (29) of the cap element (23).

A MEMS transducer package (1) is provide having a semiconductor die portion (3) with a thickness bounded by a first surface (9) and an opposite second surface (11). The package further has a transducer element (13) incorporated in the second surface (11) and a die back volume (7) that extends through the thickness of the semiconductor die portion (3) between the first surface (9) and the transducer element (13). The package is completed by a cap portion (23) that abuts the semiconductor die portion (3) at the first surface (9).

A fingerprint identification apparatus includes a fingerprint identification IC chip, a polymer film substrate and a decorative layer. The fingerprint identification IC chip comprises a plurality of metal bumps arranged on one side of the fingerprint identification IC chip. The polymer film substrate comprises a plurality of conductive pads and arranged on one side of the fingerprint identification IC chip with the metal bumps. At least part of the conductive pads is corresponding to and electrically connected to the metal bumps. The decorative layer is arranged on one side of the polymer film substrate opposite to the fingerprint identification IC chip.

A semiconductor package includes an interposer, a semiconductor element installed on a first surface of the interposer, bumps formed on a second surface of the interposer, and a chip component installed on the second surface of the interposer. The interposer is a silicon interposer; the semiconductor element is flip-chip mounted on the first surface of the interposer; the chip component is a thin film passive element formed by carrying out a thin film process on a silicon substrate, and a pad being formed on one surface of the thin film passive element; and the pad of the chip component is connected to a land formed on the second surface of the interposer using a conductive bonding material. According to this structure, the reliability of a bond between the interposer and the chip component of the semiconductor package can be ensured while achieving a small size.

Provided are an electronic component mounting package and an electronic device capable of making heat distribution of a curved electronic component mounting portion uniform. The electronic component mounting package (1) includes: a substrate (2) including a first main surface and a second main surface, and one of a recessed portion (2d) and a convex portion (2e) that is arc-shaped in a vertical cross-sectional view and that is provided in the first main surface; and a curved electronic component mounting portion (11), which is provided in the one of the recessed portion (2d) and the convex portion (2e) and on which the bent curved electronic component (10) is mounted. The substrate (2) has a notch (4) in the second main surface such that the notch (4) overlaps with the curved electronic component mounting portion (11) when the substrate (2) is viewed in a plane perspective from the first main surface side.

A semiconductor package includes: a first semiconductor chip including a first surface and a second surface opposite to each other and including first through electrodes; at least a second semiconductor chip stacked on the first surface of the first semiconductor chip and comprising second through electrodes electrically connected to the first through electrodes; and a molding layer contacting the first surface of the first semiconductor chip and a side wall of the at least one second semiconductor chip and including a first external side wall connected to and on the same plane as a side wall of the first semiconductor chip, wherein the first external side wall of the molding layer extends to be inclined with respect to a first direction orthogonal to the first surface of the first semiconductor chip, and both the external first side wall of the molding layer and the side wall of the first semiconductor chip have a first slope that is the same for both the first external side wall of the molding layer and the side wall of the first semiconductor chip.

A transferring method includes providing an adsorption device, using the adsorption device to attract and hold a plurality of light emitting diodes (LEDs), providing a target substrate with a plurality of spots of anisotropic conductive adhesive on a surface of the target substrate; moving the adsorption device or the target substrate wherein each of the plurality of LEDs adsorbed by the adsorption device becomes in contact with one of the plurality of spots of anisotropic conductive adhesive; and curing the plurality of spots of anisotropic conductive adhesive on the target substrate and moving away the adsorption device.

A stack package is disclosed. A first semiconductor die and a supporter are disposed on a package substrate. The supporter may include a second side facing a first side of the first semiconductor die having a substantially inclined surface. A second semiconductor die is stacked on the first semiconductor die and on the supporter. An encapsulant layer is formed to fill a portion between the supporter and the first semiconductor die.

In at least one embodiment, the optoelectronic semiconductor chip (100) comprises a semiconductor layer sequence (1) comprising a top side (2), a bottom side (3) diametrically opposite the top side (2), and an active layer (11) for generating electromagnetic radiation at a first wavelength (10), wherein the semiconductor chip (100) is free of a growth substrate for the semiconductor chip layer sequence (1). The semiconductor chip (100) further comprises a plurality of contact elements (30) which are arranged on the bottom side (3) and can be electronically controlled individually and independently from each other. The semiconductor layer sequence (1) is thereby divided into a plurality of emission regions (20) which are arranged laterally adjacent to one another and are constructed for the purpose of emitting radiation during operation. One of the contact elements (30) is thereby assigned to each emission region (20). Each emission region (20) further comprises a recess in the semiconductor layer sequence (1) which extends from the top side (2) in the direction of the active layer (11). In a top view of the top side (2), the recess of each emission region (20) is completely surrounded by a continuous path made of separating walls (21), wherein the separating walls (21) are formed from the semiconductor layer sequence (1).