A semiconductor package and a method for making the same are provided. The semiconductor package includes: a primary semiconductor die; an auxiliary semiconductor die attached onto a top surface of the primary semiconductor die; a first thermally conductive layer formed on a top surface of the auxiliary semiconductor die, wherein the first thermally conductive layer includes graphene-coated metallic particles; and a heat spreader thermally coupled with a top surface of the first thermally conductive layer.

A device including a substrate having a first aperture, a second aperture and a third aperture. Where a bottom surface of the first and second covers may be bonded to the top surface of substrate to cover the first and second apertures, respectively, and with first and second leads bonded to the bottom surface of the first and second covers, respectively, so the first and second leads extend through the first and second apertures, respectively. The top surface of a third cover may be bonded to the bottom surface of the substrate to cover the third aperture. The bottom portion of a seal ring may be bonded to the top portion of the substrate to surround the first, second, and third apertures, and a cap may be bonded to the top portion of the seal ring. The components may be bonded to create hermetic seals for an SMD package.

A package assembly includes a package substrate, a package lid located on the package substrate and including a plate portion, an outer foot extending from the plate portion, and an inner foot having a height greater than or equal to a height of the outer foot, extending from the plate portion and including a first inner foot corner portion located inside a first corner of the outer foot, and an adhesive that adheres the outer foot to the package substrate and adheres the inner foot to the package substrate.

A package assembly includes a package substrate, an interposer module on the package substrate, and a package lid on the interposer module and attached to the package substrate. The package lid includes an outer lid including an outer lid material and including an outer lid plate portion. The package lid further includes an inner lid including an inner lid material different than the outer lid material and including an inner lid plate portion attached to a bottom surface of the outer lid plate portion.

A semiconductor device has a substrate and electrical component disposed over the substrate. The electrical component can be a semiconductor die, semiconductor package, surface mount device, RF component, discrete electrical device, or IPD. A TIM is deposited over the electrical component. The TIM has a core, such as Cu, covered by graphene. A heat sink is disposed over the TIM, electrical component, and substrate. The TIM is printed on the electrical component. The graphene is interconnected within the TIM to form a thermal path from a first surface of the TIM to a second surface of the TIM opposite the first surface of the TIM. The TIM has thermoset material or soldering type matrix and the core covered by graphene is embedded within the thermoset material or soldering type matrix. A metal layer can be formed between the TIM and electrical component.

A semiconductor device has a substrate and a semiconductor package disposed over the substrate. An embedded bar (e-bar) substrate is disposed on the substrate around the semiconductor package. A heat sink is formed over the semiconductor package and supported by the e-bar substrate to elevate the heat sink from the substrate and reduce a thickness of the heat sink. A thermal interface material is deposited between the semiconductor package and heat sink. Alternatively, a shield layer can be formed over the semiconductor package and supported by the e-bar substrate. The e-bar substrate has a base layer and a first metal layer formed over a first surface of the base layer. A bump is formed over the first metal layer. A second metal layer can be over a second surface of the base layer opposite the first surface of the base layer. Two or more e-bar substrates can be stacked.

A power module includes a first conductor plate to which a first power semiconductor element is bonded, a second conductor plate to which a second power semiconductor element is bonded, the second conductor plate being disposed adjacent to the first conductor plate, a first heat-dissipating member disposed counter to the first conductor plate and the second conductor plate, and a first insulating sheet member disposed between the first heat-dissipating member and the first conductor plate. The first power semiconductor element is disposed at a position at which a first length from an end of the first conductor plate, the end being closer to the second conductor plate, to the first power semiconductor element is larger than a second length from an end of the first conductor plate, the end being far from the second conductor plate, to the first power semiconductor element, and the second length is larger than the thickness of the first conductor plate.

A method of forming a semiconductor package structure is provided. The method includes disposing a semiconductor device on an interposer substrate, applying an underfill layer between the semiconductor device and the interposer substrate, forming a molding layer over the semiconductor device and surrounding the underfill layer, applying a thermal interface material on the semiconductor device, and attaching a lid on the carrier substrate to cover the semiconductor device. The lid includes a lower surface having a first recess and a second recess, and the thermal interface material is partially accommodated in the first recess and the second recess. In a top view, the semiconductor device overlaps the first recess and the second recess, and a width of the semiconductor device is less than a width of the first recess and greater than a width of the second recess.

A semiconductor device including a package, a lid and a thermal interface material is provided. The package includes a packaging substrate, semiconductor dies and an insulating encapsulation, wherein the semiconductor dies are disposed on and electrically connected to the packaging substrate, and the insulating encapsulation encapsulates the semiconductor dies. The lid is disposed on the packaging substrate, the lid includes a cover portion and foot portion extending from the cover portion to the packaging substrate, wherein the cover portion covers the semiconductor dies and the insulating encapsulation, the foot portion includes foot segments laterally spaced apart from one another, and the foot segments are attached to the packaging substrate. The cover portion of the lid is attached to the package through the thermal interface material.

A semiconductor device includes a substrate, a package structure, a thermal interface material (TIM) structure, and a lid structure. The package structure is disposed on the substrate. The TIM structure is disposed on the package structure. The TIM structure includes a metallic TIM layer and a non-metallic TIM layer in contact with the metallic TIM layer, and the non-metallic TIM layer surrounds the metallic TIM layer. The lid structure is disposed on the substrate and the TIM structure.