Methods, techniques, and structures relating to die packaging. In one exemplary implementation, a die package interconnect structure includes a semiconductor substrate and a first conducting layer in contact with the semiconductor substrate. The first conducting layer may include a base layer metal. The base layer metal may include Cu. The exemplary implementation may also include a diffusion barrier in contact with the first conducting layer and a wetting layer on top of the diffusion barrier. A bump layer may reside on top of the wetting layer, in which the bump layer may include Sn, and Sn may be electroplated. The diffusion barrier may be electroless and may be adapted to prevent Cu and Sn from diffusing through the diffusion barrier. Furthermore, the diffusion barrier may be further adapted to suppress a whisker-type formation in the bump layer.

A thermal interface material comprises a polymeric elastomer material, a thermally conductive filler, and a coupling agent, along with other optional components. In one exemplary heat transfer material, a coupling agent having the formula: ##STR00001##
where Y is either a cyclic structure or Y is represented by Formula II: ##STR00002##
where: a=1 or 2 b=2 or 3 R.sub.1 contains at least one of a neoalkoxy group, an ether group, or a C2-C30 straight or branched alkyl, alkenyl, alkynyl, aralkyl, aryl, or alkaryl group R′.sub.2 and R″.sub.2 are independently selected from Hydrogen, a neoalkoxy group, an ether group, and a C2-C30 straight or branched alkyl, alkenyl, alkynyl, aralkyl, aryl, or alkaryl group X=Group four transition metal; and where a=1, R.sub.3 contains at least one of a neoalkoxy group, an ether group, or a C2-C30 straight or branched alkyl, alkenyl, alkynyl, aralkyl, aryl, or alkaryl group; or where a=2, the two R.sub.3 groups independently contain at least one of a neoalkoxy group, an ether group, or a C2-C30 straight or branched alkyl, alkenyl, alkynyl, aralkyl, aryl, or alkaryl groups or the two R.sub.3 groups together form an alkyldiolato group and, if Y is a cyclic structure, X is a member of the cyclic structure and the cyclic structure also contains a pyrophosphate group such as Formula II shown above.

A microelectronic assembly can include a substrate having first and second surfaces and an aperture extending therebetween, the substrate having terminals. The assembly can also include a first microelectronic element having a front surface facing the first surface of the substrate, a second microelectronic element having a front surface facing the first microelectronic element and projecting beyond an edge of the first microelectronic element, first and second leads electrically connecting contacts of the respective first and second microelectronic elements to the terminals, and third leads electrically interconnecting the contacts of the first and second microelectronic elements. The contacts of the first microelectronic element can be exposed at the front surface thereof adjacent the edge thereof. The contacts of the second microelectronic element can be disposed in a central region of the front surface thereof. The first, second, and third leads can have portions aligned with the aperture.

A microelectronic assembly can include a substrate having first and second surfaces and an aperture extending therebetween, the substrate having terminals. The assembly can also include a first microelectronic element having a front surface facing the first surface of the substrate, a second microelectronic element having a front surface facing the first microelectronic element and projecting beyond an edge of the first microelectronic element, first and second leads electrically connecting contacts of the respective first and second microelectronic elements to the terminals, and third leads electrically interconnecting the contacts of the first and second microelectronic elements. The contacts of the first microelectronic element can be exposed at the front surface thereof adjacent the edge thereof. The contacts of the second microelectronic element can be disposed in a central region of the front surface thereof. The first, second, and third leads can have portions aligned with the aperture.

There are disclosed impedance matching networks and technique for impedance matching to microwave power transistors. Distributed capacitor inductor networks are used so as to provide a high degree of control and accuracy, especially in terms of inductance values, in comparison to existing lumped capacitor arrangements. The use of bond wires is reduced, with inductance being provided primarily by microstrip transmission lines on the capacitors.

There are disclosed impedance matching networks and technique for impedance matching to microwave power transistors. Distributed capacitor inductor networks are used so as to provide a high degree of control and accuracy, especially in terms of inductance values, in comparison to existing lumped capacitor arrangements. The use of bond wires is reduced, with inductance being provided primarily by microstrip transmission lines on the capacitors.

In one embodiment, a semiconductor package structure includes a substrate having a well region extending from a major surface. An interposer structure is attached to the substrate within the well region. The interposer structure has a major surface that is substantially co-planar with the major surface of the substrate. An electrical device is directly attached to the substrate and the interposer structure. The interposer structure can be an active device, such as a gate driver integrated circuit, or passive device structure, such as an impedance matching network.

In one embodiment, a semiconductor package structure includes a substrate having a well region extending from a major surface. An interposer structure is attached to the substrate within the well region. The interposer structure has a major surface that is substantially co-planar with the major surface of the substrate. An electrical device is directly attached to the substrate and the interposer structure. The interposer structure can be an active device, such as a gate driver integrated circuit, or passive device structure, such as an impedance matching network.

A reduced area imaging device is provided for use in medical or dental instruments such as an endoscope. The imaging device is provided in various configurations, and connections between the imaging device elements and a video display may be achieved by wired or wireless connections. A connector assembly located near the imaging device interconnects the imaging device to an image/power cable extending through the endoscope. The connector provides strain relief and stabilization for electrically interconnecting the imager to the cable. The connector also serves as the structure for anchoring the distal ends of steering wires extending through the body of the endoscopic device. The connector includes a strain relief member mounted over a body of the connector. The connector allows a steering wire capability without enlarging the profile of the distal tip of the endoscopic device.

A high density region for a low density circuit. At least a first liquid dielectric layer is deposited on the first surface of a first circuitry layer. The dielectric layer is imaged to create plurality of first recesses. Surfaces of the first recesses are plated electro-lessly with a conductive material to form first conductive structures electrically coupled to, and extending generally perpendicular to, the first circuitry layer. A plating resist is applied. A conductive material is electro-plated to the first conductive structure to substantially fill the first recesses, and the plating resist is removed.