An antenna package includes a first antenna device including a first antenna unit, a second antenna device disposed at a level different from that of the first antenna device, the second antenna device including a second antenna unit that has a radiation direction different from that of the first antenna unit, a first circuit board electrically connected to the first antenna unit, a second circuit board electrically connected to the second antenna unit, and a third circuit board electrically and independently connected to the first circuit board and the second circuit board, the third circuit board having at least one antenna driving integrated circuit (IC) chip mounted thereon.

In various embodiments, disclosed herein are systems and methods directed to the fabrication of a coreless semiconductor package (e.g., a millimeter (mm)-wave antenna package) having an asymmetric build-up layer count that can be fabricated on both sides of a temporary substrate (e.g., a core). The asymmetric build-up layer count can reduce the overall layer count in the fabrication of the semiconductor package and can therefore contribute to fabrication cost reduction. In further embodiments, the semiconductor package (e.g., a millimeter (mm)-wave antenna packages) can further comprise dummification elements disposed near one or more antenna layers. Further, the dummification elements disposed near one or more antenna layers can reduce image current and thereby increasing the antenna gain and efficiency.

What is disclosed is a module arrangement. An antenna device and at least one electronic component are arranged next to each other and within one plane between a top side and a bottom side of the module arrangement. A shielding device which has a shielding effect relative to electromagnetic signals is located between the antenna device and the electronic component. Additionally, a method for manufacturing a module arrangement is disclosed.

An antenna module and a method for manufacturing an antenna module are provided. The antenna module includes a first dielectric substrate, a first antenna and a second antenna. The first dielectric substrate has a top surface, a bottom surface and a first side surface between the top surface and the bottom surface. The first antenna is formed on the top surface of the first dielectric substrate. The second antenna is formed on the first side surface of the first dielectric substrate.

An electronic device is provided. An electronic device includes a radio frequency integrated circuit (RFIC) chip, and an antenna array electrically connected to the RFIC chip, the antenna array including a first face and a second face facing each other in a first direction, and a third face and a fourth face connecting the first and second faces to each other and facing each other in a second direction intersecting the first direction, the antenna array including a plurality of substrates sequentially stacked in a third direction intersecting a plane defined by the first and second directions, first and second antenna modules on the plurality of substrates and sequentially arranged along the first direction, a first metal partition-wall including at least one metal via extending through the plurality of substrates in the third direction, and a second metal partition-wall surrounding the first to fourth faces.

A method for providing electromagnetic shielding of a semiconductor die includes attaching a semiconductor die to a package substrate of a packaged radio frequency module, where the package substrate includes one or more radio frequency circuits fabricated therein. The method also includes encapsulating the semiconductor die with a molding compound. The method also includes at least partially covering the molding compound with an electromagnetic shielding structure having an outer layer including cobalt. A phone board assembly can include the packaged radio frequency module attached to a printed circuit board. The packaged radio frequency module can be incorporated into a mobile device.

An antenna module includes an inner circuit board, an antenna circuit board, an outer circuit board, and at least one chip. The inner circuit board includes at least one inner wiring layer and at least one inner dielectric layer. The antenna circuit board includes at least one antenna structure. The antenna circuit board and the outer circuit board are disposed on opposite sides of the inner circuit board. The inner wiring layer comprises at least one inner pad. At least one first opening passing through the outer circuit board is defined to expose the inner pad. Each chip is received in one first opening and electrically connects to the inner pad. The antenna structure electrically connects to the chip through the inner wiring layer. A method for manufacturing such antenna module is also provided.

A chip package structure includes at least one chip, at least one thermally conductive element, a molding compound, and a redistribution layer. The respective chip has an active surface and a back surface opposite to each other and a plurality of electrodes disposed on the active surface. The thermally conductive element is disposed on the back surface of the respective chip. The molding compound encapsulates the chip and the thermally conductive element and has an upper surface and a lower surface opposite to each other. A bottom surface of each of the electrodes of the respective chip is aligned with the lower surface of the molding compound. The molding compound exposes a top surface of the respective thermally conductive element. The redistribution layer is disposed on the lower surface of the molding compound and electrically connected to the electrodes of the respective chip.

Structures and formation methods of a chip package are provided. The chip package includes a semiconductor die having a conductive element and an antenna element over the semiconductor die. The chip package also includes a first conductive feature electrically connecting the conductive element of the semiconductor die and the antenna element. The chip package further includes a protective layer surrounding the first conductive feature. In addition, the chip package includes a second conductive feature over the first conductive feature. A portion of the second conductive feature is between the first conductive feature and the protective layer.

A semiconductor package includes a supporting wiring structure including a first redistribution dielectric layer and a first redistribution conductive structure; a frame on the supporting wiring structure, having a mounting space and a through hole, and including a conductive material; a semiconductor chip in the mounting space and electrically connected to the first redistribution conductive structure; a cover wiring structure on the frame and the semiconductor chip and including a second redistribution dielectric layer and a second redistribution conductive structure; an antenna structure on the cover wiring structure; a connection structure extending in the through hole and electrically connecting the first redistribution conductive structure to the second redistribution conductive structure; and a dielectric filling member between the connection structure in the through hole and the frame and surrounding the semiconductor chip, the frame, and the connection structure.