A radio frequency receiver comprising mixer circuitry to down-convert a received signal, which is transported on a signal line to baseband signal components, is provided. The mixer circuitry comprises a plurality of switched capacitors, each connected to the signal line through a signal side node and to a corresponding switch through a switch side node. In this context, a voltage is sensed at each switch side node of the plurality of switched capacitors and is read out through a respective grounded capacitor.

A frequency multiplier includes an input section to receive a quadrature phase input signal having an input frequency, a mixer section coupled to the input section by a common mode node that forms a path for the common mode signal current to flow to the mixer section and magnetically coupled to the common mode node or capacitively coupled to the input section to generate a differential switching voltage at odd multiples of twice the input frequency, which switching voltage is applied to inputs of the mixer section, and an output section magnetically coupled to the mixer section, the output section being configured to generate an output voltage having a dominate frequency and sub-dominate frequencies spaced apart by the first multiple, the dominate frequency of the output voltage being a second multiple of the input frequency, where the second multiple is greater than the first multiple. Various arrangements are provided.

A mixer includes a load portion connected between an input terminal of a first power voltage and an output terminal of the radio frequency transmit signal and configured to adjust a magnitude of the radio frequency transmit signal, a first switching unit connected to an output terminal of the radio frequency transmit signal, and configured to perform a first switching operation in response to a plurality of local oscillation signals, and a second switching unit connected between the first switching unit and an input terminal of a second power voltage, lower than the first power voltage, and configured to perform a second switching operation in response to a plurality of baseband signals, the plurality of local oscillation signals include an I+ baseband signal, an I− baseband signal, a Q+ baseband signal, and a Q− baseband signal, and the second switching unit includes a first branch performing a switching operation under control of the I+ baseband signal and the Q+ baseband signal, a second branch performing a switching operation under control of the I− baseband signal and the Q− baseband signal, a third branch performing a switching operation under control of the Q+ baseband signal and the I− baseband signal, and a fourth branch performing a switching operation under control of the Q− baseband signal and the I+ baseband signal.

A method and apparatus for input matching of a passive mixer are disclosed. The passive mixer includes a differential transistor pair including a first transistor and a second transistor, a first inductor having one end connected to the first transistor and another end connected to a ground, a second inductor having one end connected to the second transistor and another end connected to a ground, and a third inductor having one end for receiving a radio frequency (RF) signal and another end connected to a ground.

Disclosed is a phase shifter, which includes a signal generator that generates a first signal and a second signal having a phase orthogonal to a phase of the first signal, and outputs the first signal and the second signal, an operator that generates a first current and a second current, and amplifies the first current and the second current, and a signal converter converting a first digital signal and a second digital signal. The operator includes an input circuit converting the first signal and the second signal, a path selection circuit determining paths of the generated first current and the generated second current, and a cascode circuit buffering the first current and the second current. The operator sums the first current and the second current, controls a vector of the first current and a vector of the second current, and generates a voltage signal through an output load.

An electronic circuit and method are provided. The electronic circuit includes an in-phase (I)-quadrature (Q) amplifier including an I cascode branch and a Q cascode branch, the IQ amplifier configured to receive a differential input and control signals, control, based on the control signals, gate voltages in the I cascode branch and gate voltages in the Q cascode branch, generate an I output signal with the I cascode branch, and generate a Q output signal with the Q cascode branch, and a quadrature coupler configured to perform quadrature summation of the I output signal and the Q output signal and generate a final phase shifted output.

A mixer includes a load portion connected between an input terminal of a first power voltage and an output terminal of the radio frequency transmit signal and configured to adjust a magnitude of the radio frequency transmit signal, a first switching unit connected to an output terminal of the radio frequency transmit signal, and configured to perform a first switching operation in response to a plurality of local oscillation signals, and a second switching unit connected between the first switching unit and an input terminal of a second power voltage, lower than the first power voltage, and configured to perform a second switching operation in response to a plurality of baseband signals, the plurality of local oscillation signals include an I+ baseband signal, an I− baseband signal, a Q+ baseband signal, and a Q− baseband signal, and the second switching unit includes a first branch performing a switching operation under control of the I+ baseband signal and the Q+ baseband signal, a second branch performing a switching operation under control of the I− baseband signal and the Q− baseband signal, a third branch performing a switching operation under control of the Q+ baseband signal and the I− baseband signal, and a fourth branch performing a switching operation under control of the Q− baseband signal and the I+ baseband signal.

Radio frequency (RF) mixer circuits having a complementary frequency multiplier module that requires no balun to multiply a lower frequency base oscillator signal to a higher frequency local oscillator (LO) signal, and which has a significantly reduced IC area compared to balun-based frequency multipliers. In one embodiment, the complementary frequency multiplier module includes a complementary pair of FETs controlled by an applied base oscillator signal. The complementary FETs are coupled to a common-gate FET amplifier and alternate becoming conductive in response to the base oscillator signal. The alternating switching of the complementary FETs in response to the opposing phases of the base oscillator signal cause the common-gate FET amplifier to output a higher frequency local oscillator (LO) signal. The LO signal is coupled to the LO input of a mixer or mixer core of a type suitable for use in conjunction with a frequency multiplier.

A mobile terminal including an up-converter converting a baseband (BB) signal into a radio frequency (RF) signal and a controller controlling a voltage applied to the up-converter is provided. The up-converter includes a first transistor and a second transistor each having a gate to which a baseband voltage is applied, a third transistor having a drain connected in parallel to a drain of the first transistor, and a fourth transistor having a drain connected in parallel to a drain of the second transistor, and the up-converter and the mobile terminal with improved phase linearity characteristics may be provided.

The present invention is to provide a mixing circuit, comprising: a first transistor; a second transistor; a third transistor; a first connection point connected to a gate terminal of the first transistor, a drain terminal of the second transistor and a source terminal of the third transistor; a second connection point connected to a source terminal of the first transistor and a gate terminal of the second transistor; and a third connection point connected to a drain terminal of the first transistor and a drain terminal of the third transistor.