The present invention provides a receiver having an input node, a blocker detector, a translational filter and a low-noise amplifier. The input node is arranged to receive an input signal. The blocker detector is configured to detect if the input signal has a blocker to generate a detection result. The translational filter is configured to filter out an output-of-band blocker of the input signal to generate a filtered input signal at the input node or not filter output the output-of-band blocker of the input signal according to the detection result. The low-noise amplifier is configured to receive the filtered input signal or the input signal to generate an amplified input signal.

An IF filter band-limits an intermediate frequency signal outputted from a mixer. An AFC unit controls the oscillation frequency of a PLL so that the frequency of the intermediate frequency signal is a predetermined frequency. When the AFC unit controls the oscillation frequency of the PLL, a band control unit controls the passing characteristic of the IF filter to the passing characteristic of a wide band, and after the completion of the control, controls the passing characteristic of the IF filter to the passing characteristic of a narrow band. A frequency correction unit refers to a filter information storage unit, and corrects the oscillation frequency controlled by the AFC unit according to the difference between the center frequency of the passband of the passing characteristic of the wide band and the center frequency of the passband of the passing characteristic of the narrow band.

An integrated frequency quadruplet consists of a pair of balanced frequency doublers that are driven in phase quadrature using a hybrid coupler. This approach results, effectively, in a unilateral multiplier that presents a match to the input-driving source, irrespective of the impedance of the doubler stages. The present invention applies this architecture to implement an integrated frequency quadruplet with output frequency of 160 GHz using quasi vertical GaAs varactors fabricated on thin silicon support membranes. The quadruplet has a balanced circuit architecture that addresses degradation issues often arising from impedance mis-matches between multiplier stages. A unique quasi-vertical diode process is used to implement the quadruplet, resulting in an integrated drop-in chip module that incorporates 18 varactors, matching networks and beamleads for mounting. The chip is tailored to fit a multiplier waveguide housing resulting in high reproducibility and consistency in manufacture and performance.

The disclosure relates to technology for shifting a frequency range of a signal. In one aspect, a circuit comprises a frequency mixer, a frequency synthesizer configured to generate an oscillator signal, a programmable driver, and a controller. The programmable driver is configured to receive the oscillator signal from the frequency synthesizer and to provide the oscillator signal to the oscillator input of the frequency mixer. The programmable driver is configured to have a variable drive strength. The controller is configured to control the drive strength of the programmable driver based on a frequency of the oscillator signal to adjust a rise time and a fall time of the oscillator signal at the oscillator input of the frequency mixer.

An IF filter band-limits an intermediate frequency signal outputted from a mixer. An AFC unit controls the oscillation frequency of a PLL so that the frequency of the intermediate frequency signal is a predetermined frequency. When the AFC unit controls the oscillation frequency of the PLL, a band control unit controls the passing characteristic of the IF filter to the passing characteristic of a wide band, and after the completion of the control, controls the passing characteristic of the IF filter to the passing characteristic of a narrow band. A frequency correction unit refers to a filter information storage unit, and corrects the oscillation frequency controlled by the AFC unit according to the difference between the center frequency of the passband of the passing characteristic of the wide band and the center frequency of the passband of the passing characteristic of the narrow band.

Octagonal phase rotator includes an I-mixer having an I-DAC for steering current between positive and negative phases of an in-phase signal depending on k I-DAC control bits of a control code, a Q-mixer having a Q-DAC for steering current between the positive/negative phases of a quadrature signal depending on k Q-DAC control bits of the code, and an IQ-mixer having n IQ-mixer units each comprising an IQ-DAC for switching a second current unit between the in-phase and quadrature signals, in dependence on a respective bit of n IQ-DAC control bits, and between the positive/negative phases of the in-phase and quadrature signals via I and Q polarity switches respectively of that component. I and Q polarity switches of some different IQ-DAC components switch depending on different I-DAC control bits and Q-DAC control bits respectively. A summation circuit sums weighted output signals from the mixers to produce an output signal of phase.

An improved quadrature modulator/demodulator (IQMD) may use two-phase quadrature local oscillator (LO) signal generation for generating 0 and 90 LO signals, and an anti-phase combiner/divider (at 0 and 180) on the RF (radio frequency) port. The IQMD may include mixers (which may be double-balanced passive mixers) that function as downconverters when a signal is incident at their radio frequency (RF) ports, and function as upconverters when signals are incident on their intermediate frequency (IF) ports. Accordingly, the IQMD may function as an I/Q modulator by connecting digital-to-analog converters (DAC) to the differential I and Q ports, and/or it may also function as an I/Q demodulator by connecting analog-to-digital converters (ADC) to the differential I and Q ports.

Embodiments of the present disclosure disclose a radio remote unit, a receiver, and a base station. The radio remote unit includes at least one receive channel pair, a first local oscillator module, a second local oscillator module, a local oscillator switching switch, and a controller. Each receive channel pair includes a first receive channel and a second receive channel. Each receive channel in each receive channel pair includes a filtering module, a frequency mixing module connected to the filtering module, and a digital processing module connected to the frequency mixing module. A frequency mixing module on the second receive channel is connected to the first local oscillator module and the second local oscillator module by the local oscillator switching switch. The controller is configured to receive an operating mode that is sent by a base station, and control the local oscillator switching switch to perform switching.

Circuit for wireless communication are provided, the circuits comprising: a first quadrature hybrid having a first in port, a first iso port, a first cpl port, and a first thru port; a first mixer having a first input coupled to the first cpl port and having an output; a second mixer have a first input coupled to the first cpl port and having an output; a third mixer having a first input coupled to the first thru port and having an output; a fourth mixer having a first input coupled to the first thru port and having an output; and a first complex combiner having inputs coupled to the output of the first mixer, the output of the second mixer, the output of the third mixer, and the output of the fourth mixer that provides first I and Q outputs based the output of the first mixer and the output of the second mixer.

A local oscillator device includes an oscillator module including a first inductive element and a capacitive element coupled in parallel with the inductive element. A frequency divider is coupled to the oscillator module for delivering a local oscillator signal. The local oscillator device includes an autotransformer including the first inductive element and two second inductive elements respectively coupled to the terminals of the first inductive element and to two output terminals of the autotransformer, the output terminals being further coupled to input terminals of the frequency divider.