Systems and methods for amplifying a signal is described. A circuit may convert an input radio frequency (RF) signal into a first RF signal with power level matching a power capacity of a first transistor of a first size in a carrier amplifier stage, a second RF signal with power level matching a power capacity of a second transistor of the first size in a peaking amplifier stage, and a third RF signal with third power level matching a power capacity of a third transistor of a second size in another peaking amplifier stage. The circuit may amplify the first, second, and third RF signals to generate first, second, and third amplified RF signals, respectively. The circuit may combine the first, second, and third amplified RF signals, into an output RF signal that is an amplified version of the input RF signal.

Asymmetric Doherty power amplifiers are disclosed. In certain embodiments, a Doherty power amplifier includes a carrier amplifier that generates a radio frequency carrier signal based on amplifying a radio frequency input signal, a peaking amplifier that generates a radio frequency peaking signal based on amplifying the radio frequency input signal, and a phase shifting and combining circuit configured to combine the radio frequency carrier signal and the radio frequency peaking signal to generate a radio frequency output signal. The carrier amplifier and the peaking amplifier have asymmetric amplifier sizes.

A Doherty power amplifier circuit having a main power amplification device, an auxiliary power amplification device arranged in parallel with the main power amplification device, and a load modulation circuit comprising a harmonic injection circuit connected with respective outputs of the main power amplification device and the auxiliary power amplification device. The harmonic injection circuit is arranged to transfer harmonic components generated at the main power amplification device to the auxiliary power amplification device and harmonic components generated at the auxiliary power amplification device to the main power amplification device, when both the main and auxiliary power amplification devices are operating, for modulating the respective outputs of the main power amplification device and the auxiliary power amplification device.

Various embodiments relate to a packaged radio frequency (RF) amplifier device implementing a split bondwire where the direct ground connection of an output capacitor is replaced with a set of bondwires connecting to ground in a direction opposite to the wires connecting to the output of a transistor to an output pad. This is done in order to reduce the effects of mutual inductance between the various bondwires associated with the output of the RF amplifier device.

An embodiment of the present disclosure relates to a method of controlling a power amplifier (PA). The PA can comprise a main PA path and an auxiliary PA path. The auxiliary PA path can have a plurality of turn-on settings. The method can comprise: determining a power back off gain and a lower bound gain for the PA; and performing an iterative auxiliary PA turn-on setting selection process. The selection process can comprise: determining an instantaneous power input to the PA; based on the instantaneous power input, choosing a turn-on setting in the plurality of turn-on settings of the auxiliary PA path that causes an instantaneous gain of the PA to be between the power back off gain and the lower bound gain; and applying the chosen turn-on setting to the auxiliary PA path.

A power amplifier arrangement (100) for amplifying an input signal (Pin) to produce an output signal (Pout) is disclosed. The amplifier arrangement (100) comprise an input port (IN) for receiving the input signal; an output transmission line (110) having a first terminal (111) and a second terminal (112); an output port (OUT) coupled to the second terminal (112) of the output transmission line (110) for providing the output signal; and a plurality N of amplifying devices (121, 122, . . . 12N) distributed along the output transmission line (110). The power amplifier arrangement (100) is configured such that the plurality N of amplifying devices are active sequentially for amplifying the input signal with increasing amplitude of the input signal.

A power supply modulation device includes a unit detecting, from a first digital signal, a first amplitude being the amplitude of a first analog signal provided to a first amplifier and detecting, from a second digital signal, a second amplitude being the amplitude of a second analog signal provided to a second amplifier; a unit that calculates a time differential value of a ratio of the first amplitude to a sum of the first amplitude and the second amplitude, and determines, on the basis of the time differential value, whether or not output impedance of a combining circuit that combines together the first analog signal amplified and the second analog signal changes along with a change in power of the combined signal; and a unit that controls a power supply voltage supplied to each of the first amplifier and the second amplifier, on the basis of the determination.

an amplifier having an input terminal and an output terminal. The input terminal is configured to receive a radio frequency (RF) input signal. The device includes an output network coupled to the output terminal of the power amplifier and a first passively tunable integrated circuit (PTIC) coupled to the output network. The first PTIC includes a direct-current (DC) bias voltage input terminal configured to receive a fixed bias voltage, a control signal input terminal configured to receive a time-varying control signal, wherein the fixed bias voltage in combination with the time-varying control signal sets an operating reference point of the first PTIC, and an input terminal electrically connected to the output terminal of the amplifier, wherein a change in an output voltage signal generated by the power amplifier causes the first PTIC to modify a first effective impedance of a load presented to the power amplifier via the output network.

A compensated amplifier for use in a power converter controller. The compensated amplifier comprises a first amplifier, a second amplifier, an integrator, and an arithmetic operator. The first amplifier coupled to receive a sensed signal and a reference signal and configured to generate a first error signal in response to the sensed signal and the reference signal. The second amplifier coupled to the first amplifier and configured to generate a second error signal in response to the sensed signal and the reference signal. The integrator coupled to the first amplifier and configured to generate an integrated error signal in response to the first error signal. The arithmetic operator coupled to the integrator and to the second amplifier, wherein the arithmetic operator is configured to generate a control signal in response to the integrated error signal and the second error signal.

Methods and apparatus are provided. In an example aspect, a method of operating an amplifier circuit is provided. The amplifier circuit comprises a first amplifier configured to receive a first signal, a balanced amplifier comprising second and third amplifiers and configured to receive a second signal, and a first directional coupler. An output of the first amplifier is connected to a transmitted port of the first directional coupler, an output of the second amplifier is connected to an input port of the first directional coupler, an output of the third amplifier is connected to an isolated port of the first directional coupler, and a coupled port of the first directional coupler is connected to an output of the amplifier circuit. The method comprises operating the amplifier circuit in a first output peak amplitude range of the amplifier circuit wherein, in the first output peak amplitude range, the first signal is based on a signal to be amplified and has an amplitude that increases across the first output peak amplitude range from substantially zero to a first amplitude, and the second signal is substantially zero, and operating the amplifier circuit in a second output peak amplitude range of the amplifier circuit, wherein the second output peak amplitude range is higher than the first output peak amplitude range and wherein, in the second output peak amplitude range, the first signal is based on the signal to be amplified and has an amplitude that decreases across the second output peak amplitude range from the first amplitude to a second amplitude, and the second signal is based on the signal to be amplified and has an amplitude that increases across the second output peak amplitude range from a third amplitude to a fourth amplitude.