Methods and apparatuses for controlling gain of a single stage cascode FET amplifier are presented. According to one aspect, a series-connected resistor and capacitor is coupled to a gate of a cascode FET transistor of the amplifier, the capacitor providing a short at frequencies of operation of the amplifier. According to another aspect, values of the resistor can be used to control gain of the amplifier. According to yet another aspect, the resistor is a variable resistor whose value can be controlled/adjusted to provide different gains of the amplifier according to a linear function of the resistor value. An input matching network coupled to an input of the amplifier can be used to compensate for different noise figure degradations from different values of the resistor.

An amplifier circuit with a differential input and a differential output comprises a first and a second pair of matched transistors having a first threshold voltage and comprising control terminals connected to the differential input. A first and a second pair of triplets of transistors having a second threshold voltage being different from the first threshold voltage is connected to each one of the pairs of matched transistors such that respective current paths are formed with these transistors. The currents are split up to bias current sources and to an output stage such that the current is reused for implementing a class AB operation. Furthermore, a current through bias transistors connected in the current path of the first and the second pair of matched transistors is mirrored to output transistors being arranged in a differential current path of the output stage.

The embodiments of the present disclosure provide a low noise amplifier including: an input stage circuit; a bias circuit, adapted for providing bias to the input stage circuit; an output stage circuit; a first amplifier and a second amplifier; a first middle stage circuit, adapted for implementing inter-stage matching, signal coupling and isolation between the input stage circuit and the first amplifier; and a second middle stage circuit, adapted for implementing inter-stage matching between the first amplifier and the second amplifier, wherein the first middle stage circuit is coupled with the second middle stage circuit via the first amplifier, and the second middle stage circuit is coupled with the output stage circuit via the second amplifier. Accordingly, amplifier gain of LNA is improved without increasing power consumption.

A low-noise amplifier is provided. The low-noise amplifier includes a first transistor configured to amplify an input signal; a second transistor which forms a cascade structure with the first transistor and configured to amplify an output signal of the first transistor; and a third transistor which forms a cascode structure together with the first transistor and configured to amplify the output signal of the first transistor, wherein a first signal including a sum of the output signal of the second transistor and the output signal of the third transistor is output to an output terminal.

An adaptive power amplifier and a radio frequency transmitter thereof are described. The radio frequency transmitter is a transmitter to transmit a transmission signal for a wireless communication system. The radio frequency transmitter includes at least one direct-current (DC) to direct-current (DC) converter coupled to an external power supply device for operation, a digital-to-analog converter configured to convert a digital signal into an analog signal, a filter configured to filter a harmonic component of the analog signal to generate an input signal, a RF up-converter configured to up-convert the input signal according to a desired channel frequency for generating a modulated signal, and a power amplifying circuit coupled to the DC-to-DC converter and the external power supply device, for selectively receiving one of different supply voltages for operation, and amplifying the modulated signal to generate a RF output signal.

Cascode power amplifier bias circuits suitable for operating across multiple power supply domains are provided. In certain embodiments, a power amplifier system includes a cascode power amplifier and a multi-domain bias circuit that generates at least a first cascode bias voltage for the cascode power amplifier. The multi-domain bias circuit includes a coarse regulator that generates a regulated voltage based on a power supply voltage that is operable with multiple voltage levels associated with different power supply domains, a bandgap reference circuit that is powered by the regulated voltage and outputs a bandgap reference voltage, a bias voltage generator that generates multiple selectable bias voltages based on the bandgap reference voltage, and a bias voltage selector that chooses the first cascode bias voltage from amongst the selectable bias voltages.

Amplifiers can be used for a variety of electronic-based applications. Therefore, amplifier performance is of importance. A low noise amplifier can be interfaced after an antenna or a band-select filter as a first active stage, in a receiver since its bandwidth characteristics can be closely related to a system data rate. A bandwidth enhancement technique can be leverage for low noise amplifiers by embedding a transformer between a gate and a drain terminal of a common gate transistor in a cascode topology. The embedded transformer can introduce an additional high-frequency conjugate zero pair, which can push the gain rolling-off start-up point to a higher frequency, peak the higher frequency gain, and broaden the low noise amplifier gain bandwidth.

A low noise amplifier comprising a first transconductance amplifier arranged to receive an input voltage at its input terminal and to generate an output current at its output terminal. A second transconductance amplifier is arranged such that its input terminal is connected to the input terminal of the first transconductance amplifier, and such that the output terminal of the second transconductance amplifier is connected to the input terminal of the second transconductance amplifier via a capacitive feedback network (C.sub.1).

An apparatus includes an input port, an output port, and a plurality of amplifier stages connected in parallel between the input port and the output port. Each of the amplifier stages comprises a common source field effect transistor (CSFET) and at least two common gate field effect transistors (CGFETs) coupled in series with a drain of the common source FET. At least one of the common gate field effect transistors of each stage includes a stabilizing network connected between drain and source diffusions.

Cascode amplifier having feedback circuits. In some embodiments, an amplifier can include a first transistor and a second transistor arranged in a cascode configuration, with each transistor having a gate. The amplifier can further include a first feedback circuit implemented between an output of the second transistor and the gate of the second transistor. The amplifier can further include a second feedback circuit implemented between the output of the second transistor and the gate of the first transistor.