Described are concepts, systems, circuits and techniques directed toward methods and apparatus for generating one or more pulse width modulated (PWM) waveforms with the ability to dynamically control pulse width and phase with respect to a reference signal.

Example embodiments relate to amplifiers haying improved stability. One example amplifier includes a conductive substrate, an input terminal arranged spaced apart from the conduct substrate, a first bondwire attachment structure electrically connected to or integrally formed with the input terminal, a first input matching capacitor having a non-grounded terminal and a grounded terminal, a second bondwire attachment structure electrically connected to the non-grounded terminal of the first input matching capacitor, a first semiconductor die on which a radiofrequency power transistor is arranged that has an output electrically connected to a fourth bondwire attachment structure, an output matching capacitor having a non-grounded terminal and a grounded terminal (the non-grounded terminal being electrically connected to a fifth bondwire attachment structure), an output terminal arranged spaced apart from the conductive substrate, a sixth bondwire attachment structure electrically connected to or integrally formed with the output terminal, and multiple bondwire assemblies.

Example embodiments relate to amplifiers haying improved stability. One example amplifier includes a conductive substrate, an input terminal arranged spaced apart from the conduct substrate, a first bondwire attachment structure electrically connected to or integrally formed with the input terminal, a first input matching capacitor having a non-grounded terminal and a grounded terminal, a second bondwire attachment structure electrically connected to the non-grounded terminal of the first input matching capacitor, a first semiconductor die on which a radiofrequency power transistor is arranged that has an output electrically connected to a fourth bondwire attachment structure, an output matching capacitor having a non-grounded terminal and a grounded terminal (the non-grounded terminal being electrically connected to a fifth bondwire attachment structure), an output terminal arranged spaced apart from the conductive substrate, a sixth bondwire attachment structure electrically connected to or integrally formed with the output terminal, and multiple bondwire assemblies.

Apparatus and methods for bias switching of power amplifiers are provided herein. In certain configurations, a power amplifier system includes a power amplifier that provides amplification to a radio frequency (RF) signal, a power management circuit that controls a voltage level of a supply voltage of the power amplifier, and a bias control circuit that biases the power amplifier. The power management circuit is operable in multiple supply control modes, such as an average power tracking (APT) mode and an envelope tracking (ET) mode. The bias control circuit is configured to switch a bias of the power amplifier based on the supply control mode of the power management circuit.

Apparatus and methods for bias switching of power amplifiers are provided herein. In certain configurations, a power amplifier system includes a power amplifier that provides amplification to a radio frequency (RF) signal, a power management circuit that controls a voltage level of a supply voltage of the power amplifier, and a bias control circuit that biases the power amplifier. The power management circuit is operable in multiple supply control modes, such as an average power tracking (APT) mode and an envelope tracking (ET) mode. The bias control circuit is configured to switch a bias of the power amplifier based on the supply control mode of the power management circuit.

A reconfigurable amplifier configured to decrease radio frequency (RF) signal distortion and increase dynamic range is disclosed. The reconfigurable amplifier includes an amplifier having an RF signal input, an RF signal output, and a bias signal input. A distortion detection network has a detector input coupled to the RF signal output and a detector output, wherein the distortion detector network is configured to generate a detection signal that is proportional to distortion at the RF signal output. A bias controller has a detection signal input coupled to the detector output and a bias output coupled to the bias signal input. The bias controller is configured to generate a bias signal that dynamically shifts level at the bias output to reduce the distortion at the RF signal output in response to the detection signal.

A transformer has a first inductor that includes a first port. The transformer also has a second inductor magnetically coupled to the first inductor. The second inductor includes a second port. The second inductor includes a first portion configured to permit current flow in a clockwise direction and a second portion configured to permit current flow in a counter-clockwise direction. The transformer also has a third inductor magnetically coupled to the first inductor. The third inductor includes a third port. The counter-clockwise direction is opposite the clockwise direction to reduce magnetic coupling between the second inductor and the third inductor based on magnetic coupling cancellation.

A bias circuit includes a linear core circuit CC with first and second mutually type corresponding transistors (M1; M2) and a current mirror CM with third and fourth transistors (M3; M4) of opposite type of M1 and M2. To obtain an equilibrium with a constant transconductance of the first transistor, first and second negative feedback loops (L1; L2) are applied, one including the linear core circuit CC, the other including the current mirror CM. In a first setting one loop suppresses differences between first and second drain voltages (Vd1; Vd2) and the other loop suppresses differences between one of of the first and second drain voltage Vd1 and Vd2 and a reference voltage Vref. In the second setting, one loop suppresses differences between the first drain voltage Vd1 and the reference voltage Vref and the other loop differences between the second drain voltage Vd2 and the reference voltage Vref.

A local oscillator buffer circuit comprises a complementary common-source stage comprising a first p-channel transistor (MCSP) and a first n-channel transistor (MCSN), arranged such that their respective gate terminals are connected together at a first input node, and their respective drain terminals of each of is connected together at a buffer output node. A complementary source-follower stage comprises a second p-channel transistor (MSFP) and a second n-channel transistor (MSFN), arranged such that their respective gate terminals are connected together at a second input node, and their respective source terminals are connected together at the buffer output node.

The disclosed technology relates generally to semiconductor devices, and more particularly to power semiconductor devices in which effects of charge trapping are compensated. A radio frequency (RF) power transmitter system comprises a RF power semiconductor device that outputs a time-varying gain characteristic from a RF signal input waveform originating from a digital input, wherein the time-varying gain characteristic includes a gain error associated with charge-trapping events having a memory effect on the RF power semiconductor device lasting longer than 1 microsecond. The RF power transmitter system further comprises circuitry configured to apply an analog gate bias waveform to the RF power semiconductor device based on the time-varying gain characteristic to reduce the gain error.