A circuit including an amplifier having an input and an output. The circuit also includes a current-to-voltage amplifier having an input. The circuit further includes a current mirror coupled between the output of the amplifier and the input of the current-to-voltage amplifier. The current mirror is configured to chop current flowing through the first current mirror.

A circuit includes an amplifier and pre-distortion circuit. The amplifier amplifies a modulated signal. The signal pre-distortion circuit performs a feed-forward pre-distortion of the modulated signal in a signal path in which the amplifier resides. The signal pre-distortion circuit includes: i) an envelope detector configured operative to provide an envelope information describing an envelope of the modulated signal; and ii) a built-in test circuit that determines distortion information describing a distortion in the signal path caused by amplitude variations. The signal pre-distortion circuit performs the feed-forward pre-distortion of the modulated signal on the basis of the distortion information.

A variable-gain power amplifying technique includes generating, with a network of one or more reactive components included in an oscillator, a first oscillating signal, and outputting, via one or more taps included in the network of the reactive components, a second oscillating signal. The second oscillating signal has a magnitude that is proportional to and less than the first oscillating signal. The power amplifying technique further includes selecting one of the first and second oscillating signals to use for generating a power-amplified output signal, and amplifying the selected one of the first and second oscillating signals to generate the power-amplified output signal.

A Doherty power amplifier and a method therefor are disclosed. According to one aspect, a Doherty power amplifier includes an input having a first signal path and a second signal path. The first signal path receives a first input signal at a first frequency (f1), splits the first input signal into a first main path signal and a first peak path signal according to a first splitter ratio determined in response to a first envelope of the first input signal. The second signal path receives a second input signal at a second frequency (f2), and splits the second input signal into a second main path signal and a second peak path signal according to a second splitter ratio determined in response to a second envelope of the second input signal.

Disclosed is a power amplifier system having a main amplifier with an input coupled to a main radio frequency (RF) input and an output connected to a main RF output, wherein the main amplifier exhibits a nonlinear gain characteristic with compression. At least one compression compensating amplifier has a signal input coupled to the common RF input and a signal output coupled to the common RF output.

A planar combiner system for use in high-power multi-component power amplifier architectures in solid-state amplifiers is realized by planar placement of a wideband, low-loss, insulated and compact asymmetric Lange coupling and Wilkinson-type combiner on a base with high thermal conductivity and electrical resistance, allowing the amplifiers to directly contact the cold plate.

A variable gain low noise amplifier (LNA) and a method for controlling a gain of the variable gain LNA are provided. The variable gain LNA may include a first transistor, a first degeneration inductor, a second transistor and a second degeneration inductor, wherein the first degeneration inductor is coupled to a source terminal of the first transistor, and the second degeneration inductor is coupled to a source terminal of the second transistor. Gate terminals of the first transistor and the second transistor are configured to receive an input signal. The first transistor and the first degeneration inductor belong to a first branch of the variable gain LNA, and the second transistor and the second degeneration inductor belong to a second branch of the variable gain LNA. More particularly, a gain of the variable gain LNA is determined by controlling whether to turn off the second branch.

A power amplifier circuit includes a first amplifier that operates in accordance with a first voltage supplied from a voltage supply source, amplifies a first signal, and outputs an amplification signal, a bias transistor that includes a base or a gate to which a bias control current is supplied and an emitter or a source supplying a bias to the first amplifier through a first resistor element, and a protection circuit that causes part of the bias control current to flow to a ground on the basis of the amplification signal and a second signal based on the first voltage.

A combiner circuit includes: a combiner section that outputs a combined signal by combining a first signal output from a carrier amplifier circuit and a second signal output from a peak amplifier circuit, the first signal being generated by amplifying a first distribution signal distributed from an input signal, the second signal being generated by amplifying a second distribution signal distributed from the input signal; and a matching section connected in series with the combiner section to receive the combined signal, wherein a variation coefficient of an imaginary part of impedance associated with an increase in frequency of the input signal indicates a negative value, and the matching section matches impedance between the combiner section and a load.

A power amplifier circuit includes a first amplifier transistor having a base or gate for receiving a first signal inputted, the first signal being one balanced signal, a collector or drain for outputting a first amplified signal, and an emitter or source that is electrically connected to ground, a second amplifier transistor having a base or gate for receiving a second signal inputted, the second signal being another balanced signal, a collector or drain for outputting a second amplified signal, and an emitter or source that is electrically connected to the ground, a first variable capacitance electrically coupled between the collector or drain of the second amplifier transistor and the base or gate of the first amplifier transistor, and a second variable capacitance electrically coupled between the collector or drain of the first amplifier transistor and the base or gate of the second amplifier transistor.