An amplifier may include a transistor and input and output matching networks. One or more harmonic trap circuits may be electrically connected to a node located between the input matching network and a gate terminal of the transistor or to a node located between the output matching network and a drain terminal of the transistor. Each harmonic trap may provide a low resistance path to ground for signal energy above a fundamental operating frequency of the amplifier, such as harmonic frequencies thereof. The output matching network may act as an impedance inverter that provides a 90 degree insertion phase between the input of the output matching network and the load. A variable length drain feeder may connect a voltage source to an output of the output matching network.

An amplifier may include a transistor and input and output matching networks. One or more harmonic trap circuits may be electrically connected to a node located between the input matching network and a gate terminal of the transistor or to a node located between the output matching network and a drain terminal of the transistor. Each harmonic trap may provide a low resistance path to ground for signal energy above a fundamental operating frequency of the amplifier, such as harmonic frequencies thereof. The output matching network may act as an impedance inverter that provides a 90 degree insertion phase between the input of the output matching network and the load. A variable length drain feeder may connect a voltage source to an output of the output matching network.

An amplifier package may include a transistor, an output impedance matching circuit and one or more radial stub harmonic traps coupled to a control terminal of the transistor or to an output terminal of the transistor. The output impedance matching circuit and the radial stub harmonic traps may be formed on a single substrate or separate substrates, which may be formed from gallium nitride. Each radial stub harmonic trap may provide a low resistance path to ground for signal energy above a fundamental operating frequency of the amplifier, such as harmonic frequencies thereof.

An amplifier package may include a transistor, an output impedance matching circuit and one or more radial stub harmonic traps coupled to a control terminal of the transistor or to an output terminal of the transistor. The output impedance matching circuit and the radial stub harmonic traps may be formed on a single substrate or separate substrates, which may be formed from gallium nitride. Each radial stub harmonic trap may provide a low resistance path to ground for signal energy above a fundamental operating frequency of the amplifier, such as harmonic frequencies thereof.

A Radio Frequency (RF) circuit including a receive path, a transmit path, a switching circuit, and an output configured to receive RF signals from an antenna in a receive mode of operation, and to provide RF signals to the antenna in a transmit mode of operation. The receive path is configured to be coupled between a low-noise amplifier and the output. The switching circuit is located in the receive path and is configured, in the receive mode, to selectively couple the low-noise amplifier to the output and to pass the received RF signals from the output to the low-noise amplifier. The transmit path is configured to be coupled between a power amplifier and the output, to provide, in the transmit mode, signals from the power amplifier to the output, bypassing the switching circuit, and to have, in receive mode of operation, an off-state impedance of at least 200+j*13 Ohm.

A Radio Frequency (RF) circuit including a receive path, a transmit path, a switching circuit, and an output configured to receive RF signals from an antenna in a receive mode of operation, and to provide RF signals to the antenna in a transmit mode of operation. The receive path is configured to be coupled between a low-noise amplifier and the output. The switching circuit is located in the receive path and is configured, in the receive mode, to selectively couple the low-noise amplifier to the output and to pass the received RF signals from the output to the low-noise amplifier. The transmit path is configured to be coupled between a power amplifier and the output, to provide, in the transmit mode, signals from the power amplifier to the output, bypassing the switching circuit, and to have, in receive mode of operation, an off-state impedance of at least 200+j*13 Ohm.

Apparatus and methods for overload protection of low noise amplifiers (LNAs) are provided herein. In certain configurations, an LNA system includes a switch having an analog control input, an LNA configured to provide amplification to a radio frequency (RF) input signal received from the switch, a detector configured to generate a detection current based on detecting a signal level of the LNA, and an error amplifier configured to amplify the detection current to generate an overload protection signal that controls the analog control input.

Apparatus and methods for overload protection of low noise amplifiers (LNAs) are provided herein. In certain configurations, an LNA system includes a switch having an analog control input, an LNA configured to provide amplification to a radio frequency (RF) input signal received from the switch, a detector configured to generate a detection current based on detecting a signal level of the LNA, and an error amplifier configured to amplify the detection current to generate an overload protection signal that controls the analog control input.

A bipolar transistor includes a collector layer, a base layer, and an emitter layer that are formed in this order on a compound semiconductor substrate. The emitter layer is disposed inside an edge of the base layer in plan view. A base electrode is disposed on partial regions of the emitter layer and the base layer so as to extend from an inside of the emitter layer to an outside of the base layer in plan view. An insulating film is disposed between the base electrode and a portion of the base layer, with the portion not overlapping the emitter layer. An alloy layer extends from the base electrode through the emitter layer in a thickness direction and reaches the base layer. The alloy layer contains at least one element constituting the base electrode and elements constituting the emitter layer and the base layer.

A bipolar transistor includes a collector layer, a base layer, and an emitter layer that are formed in this order on a compound semiconductor substrate. The emitter layer is disposed inside an edge of the base layer in plan view. A base electrode is disposed on partial regions of the emitter layer and the base layer so as to extend from an inside of the emitter layer to an outside of the base layer in plan view. An insulating film is disposed between the base electrode and a portion of the base layer, with the portion not overlapping the emitter layer. An alloy layer extends from the base electrode through the emitter layer in a thickness direction and reaches the base layer. The alloy layer contains at least one element constituting the base electrode and elements constituting the emitter layer and the base layer.