A pseudo resistance circuit is disclosed that is capable of suppressing fluctuation in resistance value with fluctuation in process or temperature and facilitating adjustment. The pseudo resistance circuit includes a first MOSFET, a second MOSFET, a first current source which generates a first current substantially proportional to absolute temperature, and voltage source which generates a first voltage, which is a substantially linear function of absolute temperature. The gate of the first MOSFET and the gate of the second MOSFET are connected together, the second MOSFET is diode-connected, the first current is supplied to the drain of the second MOSFET, the first voltage is applied to the source of the second MOSFET, and a resistor having a resistance value according to the gate voltage of the first MOSFET is formed between the drain and the source of the first MOSFET.

Disclosed herein are power amplification systems that are dynamically biased based on a signal indicative of an envelope of the signal being amplified. The power amplification systems include a power amplifier configured to amplify an input radio-frequency (RF) signal to generate an output RF signal when biased by a biasing signal. The power amplification systems also include a bias component configured to generate the biasing signal based on an envelope signal indicative of an envelope of the input RF signal. The biasing signal can improve or enhance the linearity of the power amplification systems.

Disclosed herein are power amplification systems that are dynamically biased based on a signal indicative of an envelope of the signal being amplified. The power amplification systems include a power amplifier configured to amplify an input radio-frequency (RF) signal to generate an output RF signal when biased by a biasing signal. The power amplification systems also include a bias component configured to generate the biasing signal based on an envelope signal indicative of an envelope of the input RF signal. The biasing signal can improve or enhance the linearity of the power amplification systems.

A current mirror circuit includes: a first transistor and a second transistor connected in series, a third transistor and a fourth transistor connected in series; and further includes: a reference voltage source, a fifth transistor, and a control module connected between the reference voltage source and the fifth transistor. A current mirror is formed by the third transistor and the fourth transistor together with the first transistor and the second transistor, to produce a mirror current at a drain of the third transistor according to a current source coupled to a drain of the first transistor; the control module is configured to control the fifth transistor to operate in the linear region.

A current mirror circuit includes: a first transistor and a second transistor connected in series, a third transistor and a fourth transistor connected in series; and further includes: a reference voltage source, a fifth transistor, and a control module connected between the reference voltage source and the fifth transistor. A current mirror is formed by the third transistor and the fourth transistor together with the first transistor and the second transistor, to produce a mirror current at a drain of the third transistor according to a current source coupled to a drain of the first transistor; the control module is configured to control the fifth transistor to operate in the linear region.

An ultrasound circuit comprising a single-ended trans-impedance amplifier (TIA) is described. The TIA is coupled to an ultrasonic transducer to amplify an electrical signal generated by the ultrasonic transducer in response to receiving an ultrasound signal. The TIA is followed by further processing circuitry configured to filter, amplify, and digitize the signal produced by the TIA.

An amplifier of an embodiment includes: a plurality of input transistors of a plurality of differential pairs; a plurality of first resistance circuits mutually connecting respective sources of the input transistors corresponding to the differential pairs and mutually connecting the respective sources and reference potential points; a plurality of second resistance circuits being connected between the respective sources of the plurality of input transistors and the reference potential points, respectively; and a control circuit configured to generate a control signal controlling whether or not to electrically connect the plurality of first resistance circuits and the plurality of second resistance circuits to the respective sources of the input transistors.

An amplifier of an embodiment includes: a plurality of input transistors of a plurality of differential pairs; a plurality of first resistance circuits mutually connecting respective sources of the input transistors corresponding to the differential pairs and mutually connecting the respective sources and reference potential points; a plurality of second resistance circuits being connected between the respective sources of the plurality of input transistors and the reference potential points, respectively; and a control circuit configured to generate a control signal controlling whether or not to electrically connect the plurality of first resistance circuits and the plurality of second resistance circuits to the respective sources of the input transistors.

A phase locked loop (PLL) circuit and a method for providing a transconductance in the PLL involve forming an input voltage to an operational amplifier by a loop filter. A voltage output of the operational amplifier controls a plurality of current mirrors. A current is formed through a first one of the current mirrors as a function of the input voltage, a resistance of a resistor, and a reference voltage. The reference voltage is directly provided by, or derived from, a reference signal. A second voltage formed in the first current mirror is fed back to the operational amplifier to maintain the current through the first current mirror, which current is then mirrored into at least a second one of the current mirrors to form an output current proportional to a difference between the input voltage and the reference voltage.

A source follower includes a first transistor, a first output module, a second transistor, a second output module and a feedback module. The first terminal and the control terminal of the first transistor are configured to respectively receive a first base voltage and a first control voltage. The second terminal of the first transistor and the first output module are electrically connected to a first output terminal. The first terminal and the control terminal of the second transistor are configured to respectively receive a first base voltage and a second control voltage. The second terminal of the second transistor and the second output module are electrically connected to a second output terminal. The feedback module is electrically connected to the control terminal of the first transistor, the control terminal of the second transistor and a reference node of the second output module.