The present invention discloses a mixer bias circuit including a first reference voltage generation circuit, an amplifier, a first transistor array, a first switch array, a second reference voltage generation circuit, a second transistor array, a second switch array, a first resistive component, and a second resistive component. The mixer bias circuit provides multiple bias voltages by dynamically tracking the common mode voltage of a trans-impedance amplifier (TIA) and compensates for imbalance and mismatch effects by asymmetrically trimming the bias voltages to improve the second-order intercept point of a radio frequency (RF) receiver front-end (RXFE).

The present invention discloses a mixer bias circuit including a first reference voltage generation circuit, an amplifier, a first transistor array, a first switch array, a second reference voltage generation circuit, a second transistor array, a second switch array, a first resistive component, and a second resistive component. The mixer bias circuit provides multiple bias voltages by dynamically tracking the common mode voltage of a trans-impedance amplifier (TIA) and compensates for imbalance and mismatch effects by asymmetrically trimming the bias voltages to improve the second-order intercept point of a radio frequency (RF) receiver front-end (RXFE).

Methods form amplifier device structures that include first-third amplifier devices. The first amplifier device produces an intermediate signal. The second amplifier device is connected to an input of the first amplifier device and produces an amplified inverted output signal. The third amplifier device inverts the intermediate signal to produce an amplified non-inverted output signal that is complementary to the amplified inverted output signal. A resistor feedback loop is connected to the input and output of the first amplifier device. A gain ratio of the gain of the third amplifier device to the gain of the second amplifier device matches a resistance ratio of the source resistance of the input signal to the resistance of the resistor added to the source resistance. Also, DC loop circuits are connected to the first-third amplifier devices, and each of the DC loop circuits connects an amplifier device output to an amplifier device input.

A measurement circuit may include a transistor having a first terminal, a second terminal, and a third terminal, wherein the first terminal is coupled to a first reference voltage. The measurement circuit may further include a first operational amplifier including a first input coupled to the second terminal of the transistor and an output coupled to the third terminal of the transistor. The first operational amplifier may further include a second input configured to receive a second reference voltage. The measurement circuit may also include a first unity-gain voltage follower including a second operational amplifier having a first input coupled to the first input of the first operational amplifier. Methods of measuring a threshold voltage, semiconductor devices, and electronic systems are also described.

An oscillator subsystem included in a phase-locked loop circuit of a computer system may include coarse and fine-tuning circuits. The coarse-tuning circuit may generate a coarse-tuning current based on a reference voltage, and the fine-tuning circuit may generate a fine-tuning current by combining respective currents generated by first and second complement current mirror circuits using a voltage level of a control signal. An oscillator circuit may generate a clock signal whose frequency is based on a combination of the coarse and fine-tuning circuits.

An amplifier applied to TIA is provided to suppress the noise caused by a current source. An amplifier constituting a transimpedance amplifier includes an inductor element inserted between a current source connected to an input terminal of an amplification stage and a power source voltage line. The current source includes a first transistor in which a base terminal is connected to a current control bias and a collector terminal is connected to the input terminal. The inductor element is inserted between the emitter terminal of the first transistor and the power source voltage line.

An amplifier applied to TIA is provided to suppress the noise caused by a current source. An amplifier constituting a transimpedance amplifier includes an inductor element inserted between a current source connected to an input terminal of an amplification stage and a power source voltage line. The current source includes a first transistor in which a base terminal is connected to a current control bias and a collector terminal is connected to the input terminal. The inductor element is inserted between the emitter terminal of the first transistor and the power source voltage line.

An electric circuit according to one embodiment of the present technology includes a target circuit and an auxiliary circuit. The target circuit includes an output portion from which predetermined output power is output, and an application point to which a voltage corresponding to the output power is applied to output the output power. The auxiliary circuit has impedance lower than impedance of the target circuit, and outputs the voltage corresponding to the output power to the application point as an auxiliary voltage.

An electric circuit according to one embodiment of the present technology includes a target circuit and an auxiliary circuit. The target circuit includes an output portion from which predetermined output power is output, and an application point to which a voltage corresponding to the output power is applied to output the output power. The auxiliary circuit has impedance lower than impedance of the target circuit, and outputs the voltage corresponding to the output power to the application point as an auxiliary voltage.

A circuit includes a first transistor having a control terminal and a current path between first and second current path terminals. A second transistor has a control terminal and a current path between first and second current path terminals. The first current path terminal of the first transistor is coupled to the first current path terminal of the second transistor at an intermediate point. A first current buffer has an input and an output. The input of the first current buffer is coupled to the second current path terminal of the first transistor. A second current buffer has an input and an output, the input of the second current buffer being coupled to the second current path terminal of the second transistor. A summation node is coupled to the outputs of the first and second current buffer.