The present disclosure provides a detailed description of techniques for implementing a low power buffer with dynamic gain control. More specifically, some embodiments of the present disclosure are directed to a buffer having a gain boost configuration and a current shunt circuit to control the gain of a respective gain boosting transistor of the gain boost configuration. The current shunt circuit and resulting gain are dynamically controlled by a gain control signal such that the buffer gain can be adjusted to within an acceptable range of the target gain for the current operating and device mismatch conditions. In one or more embodiments, the gain boost configuration with dynamic gain control can be deployed in a full differential implementation. Both analog and digital dynamic calibration and control techniques can be used to provide the gain control signals to multiple current shunt circuits and multiple buffers.

The present invention provides an amplifier circuit, wherein the amplifier circuit includes an input terminal, a capacitor, an amplifier, a feedback circuit and an aliasing tone cancellation circuit. The input terminal is configured to receive a first input signal. The capacitor is coupled to the input terminal. The amplifier is configured to receive the input signal through the capacitor to generate an output signal. The feedback circuit is coupled between an input node and an output node of the amplifier, and is configured to generate a feedback signal according to the output signal, wherein the feedback circuit includes a storage block including a switched-capacitor. The aliasing tone cancellation circuit is coupled between the input terminal of the amplifier circuit and the input node of the amplifier, and configured to generate a signal to cancel or reduce an aliasing tone of the feedback signal according to the input signal.

A radio-frequency (RF) power amplifier includes a matching network comprising at least one matching network circuit corresponding to at least one symmetry node, at least one detector for detecting power of a detected signal at the symmetry node of the matching network, and generating at least on control signal according to the power of the detected signal, wherein the detected signal is an odd harmonic of an RF signal when the RF power amplifier operates in a differential mode or an even harmonic of the RF signal when the RF power amplifier operates in a common mode, and at least one adjusting circuit for adjusting the RF signal according to the at least one control signal.

An amplifier circuit, for a capacitive acoustic transducer defining a sensing capacitor that generates a sensing signal as a function of an acoustic signal, has a first input terminal and a second input terminal, which are coupled to the sensing capacitor and: a dummy capacitor, which has a capacitance corresponding to a capacitance at rest of the sensing capacitor and a first terminal connected to the first input terminal; a first buffer amplifier, which is coupled at input to the second input terminal and defines a first differential output of the circuit; a second buffer amplifier, which is coupled at input to a second terminal of the dummy capacitor and defines a second differential output of the circuit; and a feedback stage, which is coupled between the differential outputs and the first input terminal, for feeding back onto the first input terminal a feedback signal, which has an amplitude that is a function of the sensing signal and is in phase opposition with respect thereto.

This disclosure provides isolation for a medical amplifier by providing a low impedance path for noise across an isolation barrier. The low impedance path can include a capacitive coupling between a patient ground, which is isolated from control circuitry, and a functional ground of an isolation system that is isolated from earth ground. The low impedance path can draw noise current from an input of an amplifier of patient circuitry.

Disclosed is an amplifier having a high slew rate without increasing power consumption. The amplifier includes an input unit, a conversion unit, an amplification unit, a frequency compensation circuit, and a slew rate improvement circuit. Alternatively, the amplifier includes an input unit, a conversion unit, an amplification unit, a frequency compensation circuit, a first slew rate improvement circuit, and a second slew rate improvement circuit.

Described are an amplifier circuits, systems, and methods for amplifying a plurality of sinusoid signals having a relative phase difference to each other. The amplifier circuit comprises a first sequence of at least three transistor amplifiers, wherein a first terminal of each transistor amplifier of the first sequence is configured to receive one respective signal of the plurality sinusoid signals. The amplifier further comprises a second sequence of at least three transistor amplifiers. A second terminal of each transistor amplifier of the second sequence is connected to a third terminal of one respective transistor amplifier of the first sequence. A first terminal of each transistor amplifier of the second sequence is connected to the third terminal of a next transistor amplifier of the second sequence. The first terminal of a last transistor amplifier is connected to the third terminal of a first transistor amplifier.

A differential amplifier according to an embodiment can be provided in a data driving device for driving pixels of a display panel. The differential amplifier can improve the slew rate of the differential amplifier by supplying dynamic current to an input circuit stage and/or a current mirror circuit stage of the differential amplifier through a boosting circuit stage.

Disclosed herein are related to a system and a method of amplifying an input voltage based on cascaded charge pump boosting. In one aspect, first electrical charges are stored at a first capacitor according to the input voltage to obtain a second voltage. In one aspect, the second voltage is amplified according to the first electrical charges stored by the first capacitor to obtain a third voltage. In one aspect, second electrical charges are stored at the second capacitor according to the third voltage. In one aspect, the third voltage is amplified according to the second electrical charges stored by the second capacitor to obtain a fourth voltage.

A receiver circuit may be provided. The receiver circuit may include a first duty cycle adjuster configured to correct a duty cycle of a first output signal pair. The receiver circuit may include a second duty cycle adjuster configured to correct a duty cycle of a second output signal pair, based on the first output signal pair, after the first duty cycle adjuster performs a correction on the duty cycle of the first output signal pair.