The present disclosure provides a detailed description of techniques for implementing a low power buffer with dynamic gain control. More specifically, some embodiments of the present disclosure are directed to a buffer having a gain boost configuration and a current shunt circuit to control the gain of a respective gain boosting transistor of the gain boost configuration. The current shunt circuit and resulting gain are dynamically controlled by a gain control signal such that the buffer gain can be adjusted to within an acceptable range of the target gain for the current operating and device mismatch conditions. In one or more embodiments, the gain boost configuration with dynamic gain control can be deployed in a full differential implementation. Both analog and digital dynamic calibration and control techniques can be used to provide the gain control signals to multiple current shunt circuits and multiple buffers.

An object is to output output signal amplitude exceeding power supply voltage or output signal amplitude falling below ground voltage without requiring a charge pump circuit or the like to generate positive or negative power supply voltage for an operational amplifier. The present invention provides a signal output circuit comprising an operational amplifier including: an amplification stage configured to amplify differential input voltage; and an output stage configured to amplify an input signal amplified by the amplification stage and output the input signal as an output signal, wherein the output stage is a switched capacitor circuit which includes switches and a capacitor configured to sample differential voltage between input voltage outputted from the amplification stage and voltage other than the input voltage and which transfers the differential voltage sampled by the capacitor by switching of the switches based on the input voltage.

A fully differential class-D amplifier having a controlled common-mode output voltage is disclosed. The differential class-D amplifier may include a correction circuit to determine the common-mode output voltage associated with differential pulse width modulated output signals and to generate differential correction signals to control the common-mode output voltage. In some exemplary embodiments, the differential class-D amplifier may include a plurality of gain stages to generate the differential PWM output signals. The differential correction signals may be provided to at least one stage of the differential class-D amplifier.

Aspects of this disclosure relate to an amplifier with at least two chopper amplifier channels in parallel between a shared input and differential nodes. The amplifier can multiplex outputs of the chopper amplifier channels to provide the output of one or more chopper amplifier channels to the differential nodes at a time. In certain embodiments, this can mask dynamic settling errors.

This disclosure relates to the field of amplifiers for multi-level optical communication and more particularly to techniques for trans-impedance amplifiers (TIA) with gain control. The claimed embodiments address the problem of implementing a low cost TIA that exhibits high linearity, low noise, low power, and wide bandwidth. More specifically, some claims are directed to approaches for providing TIA gain control using a plurality of inverter-based replica gain control cells controlled by a feedback loop to manage the current into the amplifying output stage and thereby the TIA output voltage.

A method for detecting a fault condition of an operational amplifier of an integrated circuit during operation includes operating an integrated circuit which includes an operational amplifier (op-amp) having a V+ input, a V input and an op-amp output and an on-line fault detector electrically coupled to the V+ input and the V input of the op-amp of the on-line fault detector, monitoring an operation of the op-amp with the on-line fault detector, and developing a fault signal at a fault detector output if the op-amp is in a fault condition as determined by the on-line fault detector.

A switching power stage for producing a load voltage at a load output of the switching power stage, wherein the load output comprises a first load terminal having a first load voltage and a second load terminal having a second load voltage such that the load voltage comprises a difference between the first and the second load voltages, that may include: a power converter comprising a power inductor and a plurality of switches, wherein the power converter is configured to drive a power converter output terminal; a linear amplifier configured to drive a linear amplifier output terminal; and a controller for controlling the plurality of switches and the linear amplifier in order to generate the load voltage as a function of an input signal to the controller such that energy delivered to the load output is supplied predominantly by the power converter.

An amplifier circuit, for a capacitive acoustic transducer defining a sensing capacitor that generates a sensing signal as a function of an acoustic signal, has a first input terminal and a second input terminal, which are coupled to the sensing capacitor and: a dummy capacitor, which has a capacitance corresponding to a capacitance at rest of the sensing capacitor and a first terminal connected to the first input terminal; a first buffer amplifier, which is coupled at input to the second input terminal and defines a first differential output of the circuit; a second buffer amplifier, which is coupled at input to a second terminal of the dummy capacitor and defines a second differential output of the circuit; and a feedback stage, which is coupled between the differential outputs and the first input terminal, for feeding back onto the first input terminal a feedback signal, which has an amplitude that is a function of the sensing signal and is in phase opposition with respect thereto.

Trans-impedance amplifier circuitry having an amplifier; a feedback resistor arranged between an output of the amplifier and an input of the amplifier; and at least one further resistor arranged physically parallel to the feedback resistor.

An autozero amplifier may include a window comparator network to monitor an output offset of a differential amplifier. The autozero amplifier may also include an integrator to receive a signal from a latched window comparator network, and send an adjustment signal back to the differential amplifier to reduce an offset of the differential amplifier.