Patent classifications
H03G3/3084
FREQUENCY DOMAIN AUTOMATIC GAIN CONTROL FOR A FREQUENCY MODULATED CONTINUOUS WAVE (FMCW) LIGHT DETECTION AND RANGING (LIDAR) SYSTEM
A light detection and ranging (LIDAR) system includes an automatic gain control (AGC) unit to reduce the dynamic range, reducing processing power and saving circuit area and cost. The system detects a return beam of a light signal transmitted to a target, having a first dynamic range in a time domain. An analog to digital converter (ADC) generates a digital signal based on the return beam. A processor can perform time domain processing on the digital signal, convert the digital signal from the time domain to a frequency domain, and perform frequency domain processing on the digital signal in the frequency domain. The AGC unit can measure a power of the return beam, and apply variable gain in the frequency domain to reduce a dynamic range of the return beam to a second dynamic range lower than the first dynamic range.
SYSTEMS AND METHODS FOR TIA BASE CURRENT DETECTION AND COMPENSATION
Described herein are systems and methods that can adjust the performance of a transimpedance amplifier (TIA) in order to compensate for changing environmental and/or manufacturing conditions. In some embodiments, the changing environmental and/or manufacturing conditions may cause a reduction in beta of a bipolar junction transistor (BJT) in the TIA. A low beta may result in a high base current for the BJT causing the output voltage of the TIA to be formatted as an unusable signal output. To compensate for the low beta, the TIA generates an intermediate signal voltage, based on the base current and beta that is compared with the PN junction bias voltage on another BJT. Based on the comparison, the state of a digital state machine may be incremented, and a threshold base current is determined. This threshold base current may decide whether to compensate the operation of the TIA, or discard the chip.
Gain-control stage for a variable gain amplifier
The invention relates to a gain-control stage (100) for generating gain-control signals (V.sub.c+, V.sub.c−) for controlling an external variable-gain amplifying unit (101). The gain-control stage comprises a first (102) and a second differential amplifier unit (112) that receive, at a respective input interface (104,114) a reference voltage signal (V.sub.Ref) and a variable gain-control voltage signal (V.sub.GC). The second differential amplifier unit is configured to provide, via a second output interface (120), a control voltage signal (V.sub.1) to a controllable first current source (106) of the first differential amplifier unit (102). The first differential amplifier unit (102) is configured to provide, via a first output interface (110), the first and the second gain-control signal (V.sub.C+, V.sub.C−) in dependence on the variable gain-control voltage signal (V.sub.GC), the reference voltage signal (V.sub.Ref) and a first biasing current (I.sub.B1) that depends on the control voltage signal.
Linear Amplifier
A linear amplifier includes a pre-amplifier configured to amplify an input differential signal, a post-amplifier configured to amplify an output signal of the pre-amplifier, an amplitude detector configured to detect an amplitude of an output signal of the post-amplifier, and an output voltage corresponding to the detected amplitude, a comparator configured to control a tail current source of the pre-amplifier such that when the output voltage of the amplitude detector is less than or equal to a reference voltage, a tail current of the pre-amplifier is set to a constant value, and when the output voltage of the amplitude detector is larger than the reference voltage, the tail current is reduced to make the output voltage of the amplitude detector equal to the reference voltage.
CMOS trans-impedance amplifier
A CMOS trans-impedance amplifier includes an inverting amplifier circuit and a feedback resistor. The inverting amplifier circuit includes an input end and an output end, and the feedback resistor is coupled therebetween. The inverting amplifier circuit includes at least three sequentially-connected amplifier units, and each amplifier unit includes at least three sequentially-connected nFETs, namely an input signal receiving part nFET, an intermediate part nFET and a DC signal receiving part nFET. A common connection terminal of the input signal receiving part nFET and the intermediate part nFET is configured to output an amplified voltage signal.
TECHNIQUES FOR AUTOMATIC GAIN CONTROL IN A FREQUENCY DOMAIN FOR A SIGNAL PATH FOR A FREQUENCY MODULATED CONTINUOUS WAVE (FMCW) LIGHT DETECTION AND RANGING (LIDAR) SYSTEM
A light detection and ranging (LIDAR) system includes an automatic gain control (AGC) unit to reduce the dynamic range, reducing processing power and saving circuit area and cost. The system detects a return beam of a light signal transmitted to a target, having a first dynamic range in a time domain. An analog to digital converter (ADC) generates a digital signal based on the return beam. A processor can perform time domain processing on the digital signal, convert the digital signal from the time domain to a frequency domain, and perform frequency domain processing on the digital signal in the frequency domain. The AGC unit can measure a power of the return beam, and apply variable gain in the frequency domain to reduce a dynamic range of the return beam to a second dynamic range lower than the first dynamic range.
TRANSCONDUCTANCE TUNING IN PHOTON COUNTING
A circuit arrangement is provided which includes an array of stages for photon counting current to voltage conversion. Each stage includes a tunable operational transconductance amplifier and a feedback network forming a feedback loop of the operational transconductance amplifier. Each stage is configured to provide an output signal as a function of an input signal that is provided to the amplifier input of the operational transconductance amplifier, wherein the input signal comprises one or more current pulses and the output signal comprises one or more voltage pulses. With the tunable operational transconductance amplifier the transconductance of a stage can be tuned so that differences in peaking time and gain are avoided. Furthermore, an imaging device and a method for operating a circuit arrangement are provided.
Common mode correction using ADC in analog probe based receiver
A method for removing offset in a receiver of an integrated circuit (IC) includes: determining digital codes of differential input voltages of an amplifier in a first receiving lane of the receiver; comparing the digital codes to a digital code corresponding to an optimum common mode voltage (VCM) of the receiver; according to the comparison, determining a bias code for adjusting both the differential input voltages to match the optimum VCM; and inputting the bias code to a bias circuit of the receiver. The first receiving lane of the receiver includes a plurality of amplifiers. The method steps are repeated for each amplifier of the plurality of amplifiers, and then repeated for all receiving lanes of the IC.
Automatic gain control method and circuit for use in burst-mode transimpedance amplifier
Provided in the present invention is an automatic gain control method for a burst-mode transimpedance amplifier. A transistor is connected in parallel at either end of a feedback resistor of a transimpedance amplifier. A gate-source voltage of the transistor is controlled by detecting and then reversely amplifying an output voltage of the transimpedance amplifier. The present invention also provides a circuit implementing the method, obviates the need for support from any particular process, and is implementable using conventional components.
Transimpedance Amplifier
A reset signal is generated by a TIA circuit alone. In an embodiment, a transimpedance amplifier configured to convert a current signal into a voltage signal includes a transimpedance stage, a gain control circuit configured to compare an output of the transimpedance stage with a reference voltage and output a gain control voltage, and a reset signal output circuit configured to output a reset signal having a predetermined pulse width at a timing of at least one of a rise or a fall of the gain control voltage.