A pulse stretcher is disclosed comprising, a stretcher input (10) and a stretcher output (20); an asynchronous finite state machine; and a delay generator (40) having a delay input connected to the stretcher output, and a delay output connected to a second input of the FSM. The asynchronous FSM comprises: a first Muller C-element gate (250) having an output connected to the stretcher output, a second Muller C-element gate (260) having an output; and a combinatorial logic circuit (270) connected to the stretcher input, to first and second inputs of each of the first and second C-elements. The first and second Muller C-element gates are cross-coupled via the combinatorial logic, such that the respective outputs of the C-element gates are complementary and, in response to receiving the input pulse at the stretcher input, the output of the first Muller C-element gate provides a stretched version of the input pulse.

Embodiments of the present invention provide for a core stage in an application-specific integrated circuit core which drives both a clock pulse signal and a clock pulse negative/complement signal concurrently, thereby resulting in perfectly aligned signals. The core stage can include a pulse generator, a clock distribution circuit, and a set of latches.

A method of measuring linearity characteristics of a delay line may be provided. The method may include generating an output signal from a receiver including a delay line. The method may also include measuring linearity characteristics of the delay line based on a target performance parameter of the output signal.

A method of measuring linearity characteristics of a delay line may be provided. The method may include generating an output signal from a receiver including a delay line. The method may also include measuring linearity characteristics of the delay line based on a target performance parameter of the output signal.

A method and a corresponding device for providing a delay value of a communication electronic unit. A digital input signal is delayed by a delay element. The input and the output signals of the delay element are sampled and the sampled signals are compared. A mismatch counter is incremented when the amplitudes of the sampled signals are not equal and a signal transition counter N is incremented when the input signal transitions. The provided delay value is proportional to the mismatch counting value, proportional to the length of the sampling intervals and inversely proportional to the signal transition counting value.

Various implementations described herein are directed to circuit. The circuit may include a first input stage having first devices and a first path for slow slew input detection. The circuit may include a second input stage having second devices and a second path for fast slew input detection. The circuit may include a separation stage that couples the second input stage to the first input stage during a first mode of operation so as to reduce power consumption of the circuit during slow slew input detection.

Various implementations described herein are directed to circuit. The circuit may include a first input stage having first devices and a first path for slow slew input detection. The circuit may include a second input stage having second devices and a second path for fast slew input detection. The circuit may include a separation stage that couples the second input stage to the first input stage during a first mode of operation so as to reduce power consumption of the circuit during slow slew input detection.

A broadband impulse generator includes a first delay line and a second delay line that receive an input signal and include a plurality of delay elements connected in series with each other, an oscillation signal generator that generates an oscillation signal having a certain number of pulses during a target impulse duration based on the input signal and an output signal of the first delay line, an envelope signal generator that generates a plurality of envelope signals having a delay duration with each other and having a certain voltage level during the target impulse duration, based on the input signal and an output signal of the second delay line, and an impulse signal generator that generates an impulse signal having the certain number of pulses during the target impulse duration based on the plurality of impulse signals and the oscillation signal.

A broadband impulse generator includes a first delay line and a second delay line that receive an input signal and include a plurality of delay elements connected in series with each other, an oscillation signal generator that generates an oscillation signal having a certain number of pulses during a target impulse duration based on the input signal and an output signal of the first delay line, an envelope signal generator that generates a plurality of envelope signals having a delay duration with each other and having a certain voltage level during the target impulse duration, based on the input signal and an output signal of the second delay line, and an impulse signal generator that generates an impulse signal having the certain number of pulses during the target impulse duration based on the plurality of impulse signals and the oscillation signal.

Time folding power combining circuits convert a continuous wave into a pulsed wave of greater peak power. Such a circuit may comprise: a switch which receives a continuous wave signal as input, and outputs first and second pulsed wave signals along first and second signal paths, respectively, said switch being configured to repeatedly switch connection back and forth between the input and the outputs of the first and second signal paths in a plurality of time frames; a delay line in the second signal path configured to introduce a time delay to the second pulsed wave signal in the second signal path such that the first pulsed wave signal in the first signal path and the time-delayed second pulsed wave signal in the second signal path substantially align in the same time frames; and a combiner, which receives the first pulsed wave signal in the first signal path and the time-delayed pulsed second wave signal in the second signal path as inputs, and combines them into a single combined pulsed wave signal as output.