A regenerative gate charging circuit includes an inductor coupled to a gate of a FET. An output control circuit is coupled to a timing control circuit and a bridged inductor driver, which is coupled to the inductor. A sense circuit is coupled to the gate and to the timing control circuit, which receives a control signal, generates output control signals in accordance with a first timing profile, and transmits the output control signals to the output control circuit. In accordance with the first timing profile, the output control circuit holds switches or controllable current sources of the bridged inductor driver in an ON state for a first period and holds the switches or controllable current sources in an OFF state for a second period. Gate voltages are sampled during the second period and after the first period. The timing control circuit generates a second timing profile using the sampled voltages.

In a method of operating a circuit, at a beginning of a first edge of a driving signal, a first transistor is turned ON to pull, at a first changing rate, a voltage of the driving signal on the first edge from a first voltage toward a second voltage. Then, in response to the voltage of the driving signal on the first edge reaching a threshold voltage between the first voltage and the second voltage, the first transistor is turned OFF and an output circuit is caused to start a second edge of an output signal in response to the first edge of the driving signal. The second edge has a slew rate corresponding to a second changing rate of the voltage of the driving signal on the first edge from the threshold voltage toward the second voltage. The second changing rate is smaller than the first changing rate.

In a method of operating a circuit, at a beginning of a first edge of a driving signal, a first transistor is turned ON to pull, at a first changing rate, a voltage of the driving signal on the first edge from a first voltage toward a second voltage. Then, in response to the voltage of the driving signal on the first edge reaching a threshold voltage between the first voltage and the second voltage, the first transistor is turned OFF and an output circuit is caused to start a second edge of an output signal in response to the first edge of the driving signal. The second edge has a slew rate corresponding to a second changing rate of the voltage of the driving signal on the first edge from the threshold voltage toward the second voltage. The second changing rate is smaller than the first changing rate.

A switch control circuit a multiplexer switch circuit and a control method for a multiplexer switch control circuit are provided. The switch control circuit comprises a first control switch, a first capacitor and a field-effect transistor switch. When the first control switch is switched off, a charging voltage released by the first capacitor can control the switching-on of the field-effect transistor switch. At this moment, since the first control switch is switched off, and a power source signal cannot reach a gate electrode of the field-effect transistor switch, power source noise cannot be coupled to a line where source and drain electrodes of the field-effect transistor switch are located. Thus, in a discharge stage of the first capacitor, a discharge voltage can serve as a control signal to control the switching-on of the field-effect transistor switch.

A switch control circuit a multiplexer switch circuit and a control method for a multiplexer switch control circuit are provided. The switch control circuit comprises a first control switch, a first capacitor and a field-effect transistor switch. When the first control switch is switched off, a charging voltage released by the first capacitor can control the switching-on of the field-effect transistor switch. At this moment, since the first control switch is switched off, and a power source signal cannot reach a gate electrode of the field-effect transistor switch, power source noise cannot be coupled to a line where source and drain electrodes of the field-effect transistor switch are located. Thus, in a discharge stage of the first capacitor, a discharge voltage can serve as a control signal to control the switching-on of the field-effect transistor switch.

A switched current source circuit, comprising first and second voltage source nodes; a load; a current source; and capacitor switching circuitry comprising a load node, a capacitor and a plurality of switches configured, based on a control signal, to adopt a biasing configuration followed by an active configuration, wherein in the biasing configuration, the load node is conductively connected to the second voltage source node to bias a voltage level at the load node, and the capacitor is connected so that it at least partly charges; and in the active configuration, the load node is conductively connected via the load to the first voltage source node, and via the capacitor to the current source to increase a potential difference between the first voltage source node and the load node.

A switched current source circuit, comprising first and second voltage source nodes; a load; a current source; and capacitor switching circuitry comprising a load node, a capacitor and a plurality of switches configured, based on a control signal, to adopt a biasing configuration followed by an active configuration, wherein in the biasing configuration, the load node is conductively connected to the second voltage source node to bias a voltage level at the load node, and the capacitor is connected so that it at least partly charges; and in the active configuration, the load node is conductively connected via the load to the first voltage source node, and via the capacitor to the current source to increase a potential difference between the first voltage source node and the load node.

A system on chip (SoC) includes a first core and a second core, first and second power gating switches, and a first power switch. The first power gating switch is arranged between the first core and a first power rail that receives a first voltage, and is selectively turned on in response to a first power gating signal. The second power gating switch is arranged between the second core and a second power rail that receives a second voltage, and is selectively turned on in response to a second power gating signal. The first power switch is arranged between the first power rail and the second power rail, and is selectively turned on in response to a first power control signal to connect the first power gating switch or the second power gating switch both the first power rail and the second power rail.

A radio frequency (RF) switch includes a switchable RF path including a plurality of transistors coupled in series; a gate bias network including a plurality of resistors, wherein the gate bias network is coupled to each of the plurality of transistors in the switchable RF path; and a bypass network including a first plurality of transistors coupled in parallel to each of the plurality of transistors in the switchable RF path and a second plurality of transistors coupled in parallel to each of the plurality of resistors in the gate bias network.

A radio frequency (RF) switch includes a switchable RF path including a plurality of transistors coupled in series; a gate bias network including a plurality of resistors, wherein the gate bias network is coupled to each of the plurality of transistors in the switchable RF path; and a bypass network including a first plurality of transistors coupled in parallel to each of the plurality of transistors in the switchable RF path and a second plurality of transistors coupled in parallel to each of the plurality of resistors in the gate bias network.